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Author
Age
Files
Lines
*
Avoid assert when label is an empty string
Jon Burgess
2018-10-28
1
-1
/
+1
*
fix unhandled std::out_of_range when calling yosys with 3-character argument
whentze
2018-10-22
1
-2
/
+2
*
Documentation improvements etc.
Ruben Undheim
2018-10-13
1
-3
/
+1
*
Support for 'modports' for System Verilog interfaces
Ruben Undheim
2018-10-12
2
-2
/
+2
*
Synthesis support for SystemVerilog interfaces
Ruben Undheim
2018-10-12
2
-0
/
+17
*
Fix IdString M in setup_stdcells()
Adrian Wheeldon
2018-10-04
1
-1
/
+1
*
Fix Cygwin build and document needed packages
Miodrag Milanovic
2018-09-19
1
-1
/
+1
*
Merge pull request #591 from hzeller/virtual-override
Clifford Wolf
2018-08-15
8
-32
/
+31
|
\
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*
Consistent use of 'override' for virtual methods in derived classes.
Henner Zeller
2018-07-20
8
-32
/
+31
*
|
Map .eblif extension as blif.
litghost
2018-08-13
1
-0
/
+2
|
/
*
Provide source-location logging.
Henner Zeller
2018-07-19
2
-44
/
+45
*
Modify emscripten main to mount nodefs and to run arg as a script
Robert Ou
2018-05-18
1
-1
/
+18
*
Fix reading techlibs under emscripten
Robert Ou
2018-05-18
1
-1
/
+1
*
Add "#ifdef __FreeBSD__"
Christian Krämer
2018-05-13
4
-8
/
+51
*
Revert "Add "#ifdef __FreeBSD__""
Clifford Wolf
2018-05-13
4
-51
/
+8
*
Add "#ifdef __FreeBSD__"
Johnny Sorocil
2018-05-05
4
-8
/
+51
*
Add "yosys -e regex" for turning warnings into errors
Clifford Wolf
2018-05-04
3
-4
/
+22
*
Set stack size to at least 128 MB (large stack needed for parsing huge expres...
Clifford Wolf
2018-03-27
1
-0
/
+13
*
Rename rename to renames
Edmond Cote
2018-03-20
1
-3
/
+5
*
Harmonize uses of _WIN32 macro
Larry Doolittle
2018-03-11
1
-1
/
+1
*
Improve handling of warning messages
Clifford Wolf
2018-03-04
3
-12
/
+42
*
Update copyright header
Clifford Wolf
2018-03-04
1
-1
/
+1
*
Add $allconst and $allseq cell types
Clifford Wolf
2018-02-23
3
-1
/
+25
*
Do not create deep backtraces unless in ENABLE_DEBUG mode
Clifford Wolf
2018-02-03
1
-0
/
+4
*
Add support for "yosys -E"
Clifford Wolf
2018-01-07
4
-2
/
+36
*
Bugfix in hierarchy handling of blackbox module ports
Clifford Wolf
2018-01-05
2
-2
/
+4
*
Add RTLIL::Const::is_fully_ones()
Clifford Wolf
2017-12-14
2
-0
/
+12
*
Add SigSpec::is_fully_ones()
Clifford Wolf
2017-12-14
2
-0
/
+16
*
Use quote includes for yosys.h
Kevin Kiningham
2017-12-13
2
-2
/
+2
*
Add support for editline as replacement for readline
Clifford Wolf
2017-11-08
2
-10
/
+29
*
Add src arguments to all cell creator helper functions
Clifford Wolf
2017-09-09
2
-209
/
+244
*
Update more stuff to use get_src_attribute() and set_src_attribute()
Clifford Wolf
2017-09-01
1
-1
/
+1
*
Merge remote-tracking branch 'upstream/master'
Jason Lowdermilk
2017-08-30
2
-0
/
+20
|
\
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*
Add {get,set}_src_attribute() methods on RTLIL::AttrObject
Clifford Wolf
2017-08-30
2
-0
/
+20
*
|
fix indent level
Jason Lowdermilk
2017-08-30
1
-2
/
+2
*
|
Add support for source line tracking through synthesis phase
Jason Lowdermilk
2017-08-29
2
-21
/
+22
|
/
*
Add hashlib support for hashing of pools
Clifford Wolf
2017-08-22
1
-0
/
+7
*
Add consteval support for $_ANDNOT_ and $_ORNOT_
Clifford Wolf
2017-08-22
1
-0
/
+4
*
Add Const methods is_fully_zero(), is_fully_def(), and is_fully_undef()
Clifford Wolf
2017-08-18
2
-0
/
+37
*
Auto-detect JSON front-end
Clifford Wolf
2017-08-09
1
-0
/
+2
*
Add log_warning_noprefix() API, Use for Verific warnings and errors
Clifford Wolf
2017-07-27
2
-0
/
+36
*
Add "using std::get" to yosys.h
Clifford Wolf
2017-07-25
1
-0
/
+1
*
Change intptr_t to uintptr_t in hashlib.h
Clifford Wolf
2017-07-18
1
-1
/
+1
*
Fix build warnings for win64
Robert Ou
2017-07-17
1
-1
/
+1
*
Fix history namespace collision
Clifford Wolf
2017-06-20
1
-10
/
+10
*
Store command history when terminating with an error
Clifford Wolf
2017-06-20
3
-17
/
+31
*
Add "setundef -anyseq"
Clifford Wolf
2017-05-28
1
-12
/
+12
*
Enable readline and tcl in mxe builds
Clifford Wolf
2017-05-17
1
-0
/
+10
*
Add missing AndnotGate() and OrnotGate() declarations to rtlil.h
Clifford Wolf
2017-05-17
1
-13
/
+15
*
Add $_ANDNOT_ and $_ORNOT_ gates
Clifford Wolf
2017-05-17
6
-55
/
+94
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