| Commit message (Expand) | Author | Age | Files | Lines |
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| * | Add "read_ilang -lib" | Clifford Wolf | 2019-04-05 | 2 | -0/+25 |
| * | Add RTLIL::Const::ext[su](), fix RTLIL::SigSpec::extend_u0 for 0-size signals | Clifford Wolf | 2019-03-23 | 2 | -1/+9 |
| * | Add fmcombine pass | Clifford Wolf | 2019-03-15 | 2 | -17/+32 |
| * | Add hashlib "<container>::element(int n)" methods | Clifford Wolf | 2019-03-14 | 1 | -0/+6 |
| * | Fix a bug in handling quotes in multi-cmd lines in Yosys scripts | Clifford Wolf | 2019-03-12 | 1 | -1/+7 |
| * | Improve determinism of IdString DB for similar scripts | Clifford Wolf | 2019-03-11 | 4 | -5/+67 |
| * | Add ENABLE_GLOB Makefile switch | Clifford Wolf | 2019-03-11 | 1 | -3/+5 |
| * | Merge pull request #819 from YosysHQ/clifford/optd | Clifford Wolf | 2019-02-22 | 1 | -2/+16 |
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| | * | Rename "yosys -U" to "yosys -P" to avoid confusion about "undefine" | Clifford Wolf | 2019-02-21 | 1 | -3/+3 |
| | * | Rename "yosys -D" to "yosys -U", add "yosys -D" with expected behavior | Clifford Wolf | 2019-02-21 | 1 | -2/+16 |
| * | | Add FF support to wreduce | Clifford Wolf | 2019-02-20 | 1 | -0/+3 |
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| * | Add optional nullstr argument to log_id() | Clifford Wolf | 2019-01-15 | 1 | -1/+3 |
| * | Fix typographical and grammatical errors and inconsistencies. | whitequark | 2019-01-02 | 2 | -2/+2 |
| * | proc_clean: remove any empty cases if all cases use all-def compare. | whitequark | 2018-12-23 | 2 | -0/+14 |
| * | tcl: add support for passing arguments to scripts. | whitequark | 2018-12-20 | 1 | -7/+18 |
| * | Improve ConstEval error handling for non-eval cell types | Clifford Wolf | 2018-11-29 | 2 | -9/+19 |
| * | Avoid assert when label is an empty string | Jon Burgess | 2018-10-28 | 1 | -1/+1 |
| * | fix unhandled std::out_of_range when calling yosys with 3-character argument | whentze | 2018-10-22 | 1 | -2/+2 |
| * | Documentation improvements etc. | Ruben Undheim | 2018-10-13 | 1 | -3/+1 |
| * | Support for 'modports' for System Verilog interfaces | Ruben Undheim | 2018-10-12 | 2 | -2/+2 |
| * | Synthesis support for SystemVerilog interfaces | Ruben Undheim | 2018-10-12 | 2 | -0/+17 |
| * | Fix IdString M in setup_stdcells() | Adrian Wheeldon | 2018-10-04 | 1 | -1/+1 |
| * | Fix Cygwin build and document needed packages | Miodrag Milanovic | 2018-09-19 | 1 | -1/+1 |
| * | Merge pull request #591 from hzeller/virtual-override | Clifford Wolf | 2018-08-15 | 8 | -32/+31 |
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| | * | Consistent use of 'override' for virtual methods in derived classes. | Henner Zeller | 2018-07-20 | 8 | -32/+31 |
| * | | Map .eblif extension as blif. | litghost | 2018-08-13 | 1 | -0/+2 |
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| * | Provide source-location logging. | Henner Zeller | 2018-07-19 | 2 | -44/+45 |
| * | Modify emscripten main to mount nodefs and to run arg as a script | Robert Ou | 2018-05-18 | 1 | -1/+18 |
| * | Fix reading techlibs under emscripten | Robert Ou | 2018-05-18 | 1 | -1/+1 |
| * | Add "#ifdef __FreeBSD__" | Christian Krämer | 2018-05-13 | 4 | -8/+51 |
| * | Revert "Add "#ifdef __FreeBSD__"" | Clifford Wolf | 2018-05-13 | 4 | -51/+8 |
| * | Add "#ifdef __FreeBSD__" | Johnny Sorocil | 2018-05-05 | 4 | -8/+51 |
| * | Add "yosys -e regex" for turning warnings into errors | Clifford Wolf | 2018-05-04 | 3 | -4/+22 |
| * | Set stack size to at least 128 MB (large stack needed for parsing huge expres... | Clifford Wolf | 2018-03-27 | 1 | -0/+13 |
| * | Rename rename to renames | Edmond Cote | 2018-03-20 | 1 | -3/+5 |
| * | Harmonize uses of _WIN32 macro | Larry Doolittle | 2018-03-11 | 1 | -1/+1 |
| * | Improve handling of warning messages | Clifford Wolf | 2018-03-04 | 3 | -12/+42 |
| * | Update copyright header | Clifford Wolf | 2018-03-04 | 1 | -1/+1 |
| * | Add $allconst and $allseq cell types | Clifford Wolf | 2018-02-23 | 3 | -1/+25 |
| * | Do not create deep backtraces unless in ENABLE_DEBUG mode | Clifford Wolf | 2018-02-03 | 1 | -0/+4 |
| * | Add support for "yosys -E" | Clifford Wolf | 2018-01-07 | 4 | -2/+36 |
| * | Bugfix in hierarchy handling of blackbox module ports | Clifford Wolf | 2018-01-05 | 2 | -2/+4 |
| * | Add RTLIL::Const::is_fully_ones() | Clifford Wolf | 2017-12-14 | 2 | -0/+12 |
| * | Add SigSpec::is_fully_ones() | Clifford Wolf | 2017-12-14 | 2 | -0/+16 |
| * | Use quote includes for yosys.h | Kevin Kiningham | 2017-12-13 | 2 | -2/+2 |
| * | Add support for editline as replacement for readline | Clifford Wolf | 2017-11-08 | 2 | -10/+29 |
| * | Add src arguments to all cell creator helper functions | Clifford Wolf | 2017-09-09 | 2 | -209/+244 |
| * | Update more stuff to use get_src_attribute() and set_src_attribute() | Clifford Wolf | 2017-09-01 | 1 | -1/+1 |
| * | Merge remote-tracking branch 'upstream/master' | Jason Lowdermilk | 2017-08-30 | 2 | -0/+20 |
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| | * | Add {get,set}_src_attribute() methods on RTLIL::AttrObject | Clifford Wolf | 2017-08-30 | 2 | -0/+20 |
