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* Add RTLIL::Const::ext[su](), fix RTLIL::SigSpec::extend_u0 for 0-size signalsClifford Wolf2019-03-232-1/+9
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add fmcombine passClifford Wolf2019-03-152-17/+32
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add hashlib "<container>::element(int n)" methodsClifford Wolf2019-03-141-0/+6
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Fix a bug in handling quotes in multi-cmd lines in Yosys scriptsClifford Wolf2019-03-121-1/+7
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Improve determinism of IdString DB for similar scriptsClifford Wolf2019-03-114-5/+67
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add ENABLE_GLOB Makefile switchClifford Wolf2019-03-111-3/+5
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Merge pull request #819 from YosysHQ/clifford/optdClifford Wolf2019-02-221-2/+16
|\ | | | | Rename "yosys -D" to "yosys -U", add "yosys -D" with expected behavior
| * Rename "yosys -U" to "yosys -P" to avoid confusion about "undefine"Clifford Wolf2019-02-211-3/+3
| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * Rename "yosys -D" to "yosys -U", add "yosys -D" with expected behaviorClifford Wolf2019-02-211-2/+16
| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | Add FF support to wreduceClifford Wolf2019-02-201-0/+3
|/ | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add optional nullstr argument to log_id()Clifford Wolf2019-01-151-1/+3
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Fix typographical and grammatical errors and inconsistencies.whitequark2019-01-022-2/+2
| | | | | | | | | | | | The initial list of hits was generated with the codespell command below, and each hit was evaluated and fixed manually while taking context into consideration. DIRS="kernel/ frontends/ backends/ passes/ techlibs/" DIRS="${DIRS} libs/ezsat/ libs/subcircuit" codespell $DIRS -S *.o -L upto,iff,thru,synopsys,uint More hits were found by looking through comments and strings manually.
* proc_clean: remove any empty cases if all cases use all-def compare.whitequark2018-12-232-0/+14
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* tcl: add support for passing arguments to scripts.whitequark2018-12-201-7/+18
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* Improve ConstEval error handling for non-eval cell typesClifford Wolf2018-11-292-9/+19
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Avoid assert when label is an empty stringJon Burgess2018-10-281-1/+1
| | | | | | | | | | | | | | Calling back() on an empty string is not allowed and triggers an assert with recent gcc: $ cd manual/PRESENTATION_Intro $ ../../yosys counter.ys ... /usr/include/c++/8/bits/basic_string.h:1136: std::__cxx11::basic_string<_CharT, _Traits, _Alloc>::reference std::__cxx11::basic_string<_CharT, _Traits, _Alloc>::back() [with _CharT = char; _Traits = std::char_traits<char>; _Alloc = std::allocator<char>; std::__cxx11::basic_string<_CharT, _Traits, _Alloc>::reference = char&]: Assertion '!empty()' failed. 802 if (label.back() == ':' && GetSize(label) > 1) (gdb) p label $1 = ""
* fix unhandled std::out_of_range when calling yosys with 3-character argumentwhentze2018-10-221-2/+2
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* Documentation improvements etc.Ruben Undheim2018-10-131-3/+1
| | | | | | | | | - Mention new feature in the SystemVerilog section in the README file - Commented changes much better - Rename a few signals to make it clearer - Prevent warning for unused signals in an easier way - Add myself as copyright holder to 2 files - Fix one potential memory leak (delete 'wire' if not in modport)
* Support for 'modports' for System Verilog interfacesRuben Undheim2018-10-122-2/+2
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* Synthesis support for SystemVerilog interfacesRuben Undheim2018-10-122-0/+17
| | | | This time doing the changes mostly in AST before RTLIL generation
* Fix IdString M in setup_stdcells()Adrian Wheeldon2018-10-041-1/+1
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* Fix Cygwin build and document needed packagesMiodrag Milanovic2018-09-191-1/+1
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* Merge pull request #591 from hzeller/virtual-overrideClifford Wolf2018-08-158-32/+31
|\ | | | | Consistent use of 'override' for virtual methods in derived classes.
| * Consistent use of 'override' for virtual methods in derived classes.Henner Zeller2018-07-208-32/+31
| | | | | | | | | | | | | | | | | | o Not all derived methods were marked 'override', but it is a great feature of C++11 that we should make use of. o While at it: touched header files got a -*- c++ -*- for emacs to provide support for that language. o use YS_OVERRIDE for all override keywords (though we should probably use the plain keyword going forward now that C++11 is established)
* | Map .eblif extension as blif.litghost2018-08-131-0/+2
|/ | | | Signed-off-by: litghost <537074+litghost@users.noreply.github.com>
* Provide source-location logging.Henner Zeller2018-07-192-44/+45
| | | | | | | | o Provide log_file_warning() and log_file_error() that prefix the log message with <filename>:<lineno>: to be easily picked up by IDEs that need to step through errors. o Simplify some duplicate logging code in kernel/log.cc o Use the new log functions in genrtlil.
* Modify emscripten main to mount nodefs and to run arg as a scriptRobert Ou2018-05-181-1/+18
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* Fix reading techlibs under emscriptenRobert Ou2018-05-181-1/+1
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* Add "#ifdef __FreeBSD__"Christian Krämer2018-05-134-8/+51
| | | | (Re-commit e3575a8 with corrected author field)
* Revert "Add "#ifdef __FreeBSD__""Clifford Wolf2018-05-134-51/+8
| | | | This reverts commit e3575a86c525f2511902e7022893c3923ba8093e.
* Add "#ifdef __FreeBSD__"Johnny Sorocil2018-05-054-8/+51
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* Add "yosys -e regex" for turning warnings into errorsClifford Wolf2018-05-043-4/+22
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Set stack size to at least 128 MB (large stack needed for parsing huge ↵Clifford Wolf2018-03-271-0/+13
| | | | | | expressions) Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Rename rename to renamesEdmond Cote2018-03-201-3/+5
| | | Create TCL alias for rename command. Using renames. Following the same convention as proc -> procs.
* Harmonize uses of _WIN32 macroLarry Doolittle2018-03-111-1/+1
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* Improve handling of warning messagesClifford Wolf2018-03-043-12/+42
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Update copyright headerClifford Wolf2018-03-041-1/+1
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add $allconst and $allseq cell typesClifford Wolf2018-02-233-1/+25
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Do not create deep backtraces unless in ENABLE_DEBUG modeClifford Wolf2018-02-031-0/+4
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add support for "yosys -E"Clifford Wolf2018-01-074-2/+36
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Bugfix in hierarchy handling of blackbox module portsClifford Wolf2018-01-052-2/+4
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add RTLIL::Const::is_fully_ones()Clifford Wolf2017-12-142-0/+12
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* Add SigSpec::is_fully_ones()Clifford Wolf2017-12-142-0/+16
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* Use quote includes for yosys.hKevin Kiningham2017-12-132-2/+2
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* Add support for editline as replacement for readlineClifford Wolf2017-11-082-10/+29
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* Add src arguments to all cell creator helper functionsClifford Wolf2017-09-092-209/+244
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* Update more stuff to use get_src_attribute() and set_src_attribute()Clifford Wolf2017-09-011-1/+1
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* Merge remote-tracking branch 'upstream/master'Jason Lowdermilk2017-08-302-0/+20
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| * Add {get,set}_src_attribute() methods on RTLIL::AttrObjectClifford Wolf2017-08-302-0/+20
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* | fix indent levelJason Lowdermilk2017-08-301-2/+2
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