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* Add RTLIL::Const::ext[su](), fix RTLIL::SigSpec::extend_u0 for 0-size signalsClifford Wolf2019-03-232-1/+9
* Add fmcombine passClifford Wolf2019-03-152-17/+32
* Add hashlib "<container>::element(int n)" methodsClifford Wolf2019-03-141-0/+6
* Fix a bug in handling quotes in multi-cmd lines in Yosys scriptsClifford Wolf2019-03-121-1/+7
* Improve determinism of IdString DB for similar scriptsClifford Wolf2019-03-114-5/+67
* Add ENABLE_GLOB Makefile switchClifford Wolf2019-03-111-3/+5
* Merge pull request #819 from YosysHQ/clifford/optdClifford Wolf2019-02-221-2/+16
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| * Rename "yosys -U" to "yosys -P" to avoid confusion about "undefine"Clifford Wolf2019-02-211-3/+3
| * Rename "yosys -D" to "yosys -U", add "yosys -D" with expected behaviorClifford Wolf2019-02-211-2/+16
* | Add FF support to wreduceClifford Wolf2019-02-201-0/+3
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* Add optional nullstr argument to log_id()Clifford Wolf2019-01-151-1/+3
* Fix typographical and grammatical errors and inconsistencies.whitequark2019-01-022-2/+2
* proc_clean: remove any empty cases if all cases use all-def compare.whitequark2018-12-232-0/+14
* tcl: add support for passing arguments to scripts.whitequark2018-12-201-7/+18
* Improve ConstEval error handling for non-eval cell typesClifford Wolf2018-11-292-9/+19
* Avoid assert when label is an empty stringJon Burgess2018-10-281-1/+1
* fix unhandled std::out_of_range when calling yosys with 3-character argumentwhentze2018-10-221-2/+2
* Documentation improvements etc.Ruben Undheim2018-10-131-3/+1
* Support for 'modports' for System Verilog interfacesRuben Undheim2018-10-122-2/+2
* Synthesis support for SystemVerilog interfacesRuben Undheim2018-10-122-0/+17
* Fix IdString M in setup_stdcells()Adrian Wheeldon2018-10-041-1/+1
* Fix Cygwin build and document needed packagesMiodrag Milanovic2018-09-191-1/+1
* Merge pull request #591 from hzeller/virtual-overrideClifford Wolf2018-08-158-32/+31
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| * Consistent use of 'override' for virtual methods in derived classes.Henner Zeller2018-07-208-32/+31
* | Map .eblif extension as blif.litghost2018-08-131-0/+2
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* Provide source-location logging.Henner Zeller2018-07-192-44/+45
* Modify emscripten main to mount nodefs and to run arg as a scriptRobert Ou2018-05-181-1/+18
* Fix reading techlibs under emscriptenRobert Ou2018-05-181-1/+1
* Add "#ifdef __FreeBSD__"Christian Krämer2018-05-134-8/+51
* Revert "Add "#ifdef __FreeBSD__""Clifford Wolf2018-05-134-51/+8
* Add "#ifdef __FreeBSD__"Johnny Sorocil2018-05-054-8/+51
* Add "yosys -e regex" for turning warnings into errorsClifford Wolf2018-05-043-4/+22
* Set stack size to at least 128 MB (large stack needed for parsing huge expres...Clifford Wolf2018-03-271-0/+13
* Rename rename to renamesEdmond Cote2018-03-201-3/+5
* Harmonize uses of _WIN32 macroLarry Doolittle2018-03-111-1/+1
* Improve handling of warning messagesClifford Wolf2018-03-043-12/+42
* Update copyright headerClifford Wolf2018-03-041-1/+1
* Add $allconst and $allseq cell typesClifford Wolf2018-02-233-1/+25
* Do not create deep backtraces unless in ENABLE_DEBUG modeClifford Wolf2018-02-031-0/+4
* Add support for "yosys -E"Clifford Wolf2018-01-074-2/+36
* Bugfix in hierarchy handling of blackbox module portsClifford Wolf2018-01-052-2/+4
* Add RTLIL::Const::is_fully_ones()Clifford Wolf2017-12-142-0/+12
* Add SigSpec::is_fully_ones()Clifford Wolf2017-12-142-0/+16
* Use quote includes for yosys.hKevin Kiningham2017-12-132-2/+2
* Add support for editline as replacement for readlineClifford Wolf2017-11-082-10/+29
* Add src arguments to all cell creator helper functionsClifford Wolf2017-09-092-209/+244
* Update more stuff to use get_src_attribute() and set_src_attribute()Clifford Wolf2017-09-011-1/+1
* Merge remote-tracking branch 'upstream/master'Jason Lowdermilk2017-08-302-0/+20
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| * Add {get,set}_src_attribute() methods on RTLIL::AttrObjectClifford Wolf2017-08-302-0/+20
* | fix indent levelJason Lowdermilk2017-08-301-2/+2
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