| Commit message (Expand) | Author | Age | Files | Lines |
* | Warn on literals exceeding the specified bit width | Florian Zeitz | 2015-08-17 | 1 | -34/+39 |
* | Another block of spelling fixes | Larry Doolittle | 2015-08-14 | 3 | -7/+7 |
* | Keep gcc from complaining about uninitialized variables | Larry Doolittle | 2015-08-14 | 1 | -2/+2 |
* | Re-created command-reference-manual.tex, copied some doc fixes to online help | Clifford Wolf | 2015-08-14 | 1 | -6/+6 |
* | Spell check (by Larry Doolittle) | Clifford Wolf | 2015-08-14 | 5 | -16/+16 |
* | Adjust makefiles to work with out-of-tree builds | Clifford Wolf | 2015-08-12 | 6 | -8/+12 |
* | Fixed handling of [a-fxz?] in decimal constants | Clifford Wolf | 2015-08-11 | 1 | -2/+7 |
* | Add -noautowire option to verilog frontend | Marcus Comstedt | 2015-08-01 | 1 | -1/+8 |
* | Added WORDS parameter to $meminit | Clifford Wolf | 2015-07-31 | 3 | -7/+67 |
* | Fixed nested mem2reg | Clifford Wolf | 2015-07-29 | 2 | -4/+11 |
* | Fixed trailing whitespaces | Clifford Wolf | 2015-07-02 | 20 | -49/+49 |
* | Fixed handling of parameters with reversed range | Clifford Wolf | 2015-06-08 | 1 | -1/+1 |
* | Fixed signedness of genvar expressions | Clifford Wolf | 2015-05-29 | 1 | -2/+2 |
* | Improvements in BLIF front-end | Clifford Wolf | 2015-05-24 | 1 | -4/+50 |
* | bugfix in blif front-end | Clifford Wolf | 2015-05-18 | 1 | -3/+3 |
* | Improved .latch support in BLIF front-end | Clifford Wolf | 2015-05-17 | 1 | -3/+30 |
* | Added read_blif command | Clifford Wolf | 2015-05-17 | 1 | -1/+31 |
* | Generalized blifparse API | Clifford Wolf | 2015-05-17 | 2 | -17/+25 |
* | abc/blifparse files reorganization | Clifford Wolf | 2015-05-17 | 3 | -0/+298 |
* | Verific build fixes | Clifford Wolf | 2015-05-17 | 2 | -2/+2 |
* | Verilog front-end: define `BLACKBOX in -lib mode | Clifford Wolf | 2015-04-19 | 1 | -1/+2 |
* | Ignore celldefine directive in verilog front-end | Clifford Wolf | 2015-03-25 | 1 | -0/+3 |
* | Const-fold parameter defs on-demand in AstNode::detectSignWidthWorker() | Clifford Wolf | 2015-03-01 | 1 | -2/+4 |
* | Added non-std verilog assume() statement | Clifford Wolf | 2015-02-26 | 8 | -13/+37 |
* | Added deep recursion warning to AST simplify | Clifford Wolf | 2015-02-20 | 1 | -1/+7 |
* | Parser support for complex delay expressions | Clifford Wolf | 2015-02-20 | 2 | -8/+21 |
* | YosysJS stuff | Clifford Wolf | 2015-02-19 | 1 | -0/+1 |
* | Convert floating point cell parameters to strings | Clifford Wolf | 2015-02-18 | 1 | -9/+12 |
* | Various fixes for memories with offsets | Clifford Wolf | 2015-02-14 | 2 | -6/+5 |
* | Added "read_verilog -nomeminit" and "nomeminit" attribute | Clifford Wolf | 2015-02-14 | 4 | -7/+29 |
* | Creating $meminit cells in verilog front-end | Clifford Wolf | 2015-02-14 | 4 | -33/+57 |
* | Fixed handling of "//" in filenames in verilog pre-processor | Clifford Wolf | 2015-02-14 | 2 | -1/+5 |
* | Added AstNode::simplify() recursion counter | Clifford Wolf | 2015-02-13 | 1 | -2/+10 |
* | Improved read_verilog support for empty behavioral statements | Clifford Wolf | 2015-02-10 | 1 | -6/+2 |
* | Ignore explicit assignments to constants in HDL code | Clifford Wolf | 2015-02-08 | 1 | -0/+14 |
* | Fixed a bug with autowire bit size | Clifford Wolf | 2015-02-08 | 1 | -9/+3 |
* | Added ENABLE_NDEBUG makefile options | Clifford Wolf | 2015-01-24 | 1 | -0/+2 |
* | Ignoring more system task and functions | Clifford Wolf | 2015-01-15 | 2 | -2/+4 |
* | Fixed handling of "input foo; reg [0:0] foo;" | Clifford Wolf | 2015-01-15 | 1 | -0/+7 |
* | Consolidate "Blocking assignment to memory.." msgs for the same line | Clifford Wolf | 2015-01-15 | 1 | -3/+9 |
* | Enable bison to be customized | Fabio Utzig | 2015-01-08 | 2 | -2/+2 |
* | Define YOSYS and SYNTHESIS in preproc | Clifford Wolf | 2015-01-02 | 1 | -1/+2 |
* | Fixed memory->start_offset handling | Clifford Wolf | 2015-01-01 | 2 | -6/+10 |
* | Added global yosys_celltypes | Clifford Wolf | 2014-12-29 | 1 | -1/+1 |
* | dict/pool changes in ast | Clifford Wolf | 2014-12-29 | 3 | -16/+24 |
* | Changed more code to dict<> and pool<> | Clifford Wolf | 2014-12-28 | 3 | -6/+6 |
* | Improved some warning messages | Clifford Wolf | 2014-12-27 | 1 | -6/+18 |
* | Fixed mem2reg warning message | Clifford Wolf | 2014-12-27 | 1 | -3/+3 |
* | Added Yosys::{dict,nodict,vector} container types | Clifford Wolf | 2014-12-26 | 3 | -3/+3 |
* | Renamed extend() to extend_xx(), changed most users to extend_u0() | Clifford Wolf | 2014-12-24 | 1 | -1/+1 |