iCE40/yosys - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	Fixed relational operators for const real expressions	Clifford Wolf	2014-06-14	1	-8/+8
*	Added support for math functions	Clifford Wolf	2014-06-14	1	-0/+70
*	Added handling of real-valued parameters/localparams	Clifford Wolf	2014-06-14	4	-24/+62
*	Implemented more real arithmetic	Clifford Wolf	2014-06-14	1	-27/+70
*	Implemented basic real arithmetic	Clifford Wolf	2014-06-14	3	-6/+51
*	Added real->int convertion in ast genrtlil	Clifford Wolf	2014-06-14	1	-0/+12
*	Added Verilog lexer and parser support for real values	Clifford Wolf	2014-06-13	4	-3/+31
*	Added read_verilog -sv options, added support for bit, logic,	Clifford Wolf	2014-06-12	4	-3/+37
*	Add support for cell arrays	Clifford Wolf	2014-06-07	4	-0/+34
*	Added support for repeat stmt in const functions	Clifford Wolf	2014-06-07	1	-0/+19
*	further improved const function support	Clifford Wolf	2014-06-07	3	-17/+22
*	made the generate..endgenrate keywords optional	Clifford Wolf	2014-06-06	1	-4/+8
*	improved const function support	Clifford Wolf	2014-06-06	3	-5/+41
*	fix functions with no block (but single statement, loop, etc.)	Clifford Wolf	2014-06-06	1	-11/+4
*	improved ast simplify of const functions	Clifford Wolf	2014-06-06	1	-7/+28
*	added while and repeat support to verilog parser	Clifford Wolf	2014-06-06	4	-1/+31
*	Improved error message for options after front-end filename arguments	Clifford Wolf	2014-06-04	1	-1/+1
*	new flags -ignore_miss_func and -ignore_miss_dir for read_liberty	Johann Glaser	2014-05-28	1	-4/+40
*	Fixed clang -Wdeprecated-register warnings	Clifford Wolf	2014-04-20	2	-0/+12
*	Replaced depricated %name-prefix= bison directive	Clifford Wolf	2014-04-20	2	-2/+2
*	Fixed mapping of Verific WIDE_DFFRS operator	Clifford Wolf	2014-03-20	1	-2/+2
*	Fixed mapping of Verific FADD primitive with unconnected outputs	Clifford Wolf	2014-03-20	1	-4/+5
*	Progress in Verific bindings	Clifford Wolf	2014-03-17	1	-8/+51
*	Progress in Verific bindings	Clifford Wolf	2014-03-17	1	-5/+50
*	Progress in Verific bindings	Clifford Wolf	2014-03-17	1	-0/+2
*	Added support for memories to verific bindings	Clifford Wolf	2014-03-16	2	-1/+86
*	Use Verific Net::{IsGnd,IsPwr} API in Verific bindings	Clifford Wolf	2014-03-16	1	-27/+11
*	Progress in Verific bindings	Clifford Wolf	2014-03-15	1	-39/+16
*	Progress in Verific bindings	Clifford Wolf	2014-03-15	1	-7/+15
*	Progress in Verific bindings	Clifford Wolf	2014-03-15	1	-31/+31
*	Progress in Verific bindings	Clifford Wolf	2014-03-14	1	-13/+38
*	Progress in Verific bindings	Clifford Wolf	2014-03-14	1	-222/+338
*	Progress in Verific bindings	Clifford Wolf	2014-03-13	1	-10/+65
*	Copy Verific vdbs files to Yosys "share" data directory	Clifford Wolf	2014-03-13	2	-8/+23
*	Added test_navre.ys for verific frontend	Clifford Wolf	2014-03-13	1	-0/+17
*	Merged OSX fixes from Siesh1oo with some modifications	Clifford Wolf	2014-03-13	1	-0/+1
*	Merged a few fixes for non-posix systems from github.com/Siesh1oo/yosys	Clifford Wolf	2014-03-11	1	-4/+12
*	Added support for `line compiler directive	Clifford Wolf	2014-03-11	1	-0/+11
*	Improved verific command (added support for some operators)	Clifford Wolf	2014-03-10	1	-2/+160
*	Improvements in verific command	Clifford Wolf	2014-03-10	1	-59/+39
*	Added "verific" command	Clifford Wolf	2014-03-09	2	-0/+489
*	Bugfix in ilang frontend autoidx recovery	Clifford Wolf	2014-03-07	1	-2/+2
*	Fixed gcc compiler warning	Clifford Wolf	2014-03-06	1	-1/+2
*	Include id2ast pointers when dumping AST	Clifford Wolf	2014-03-05	1	-0/+6
*	Fixed merging of compatible wire decls in AST frontend	Clifford Wolf	2014-03-05	1	-1/+4
*	Bugfix in recursive AST simplification	Clifford Wolf	2014-03-05	1	-10/+22
*	Fixed vhdl2verilog temp dir name	Clifford Wolf	2014-03-01	1	-1/+1
*	Fixed vhdl2verilog help message	Clifford Wolf	2014-03-01	1	-3/+2
*	Fixed bit-extending in $mux argument (use $bu0 instead of $pos)	Clifford Wolf	2014-02-26	1	-5/+5
*	Don't blow up constants unneccessarily in Verilog frontend	Clifford Wolf	2014-02-24	1	-1/+1