iCE40/yosys - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	Merge https://github.com/cliffordwolf/yosys	Andrew Zonenberg	2016-12-17	2	-1/+61
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\| *	Added "verilog_defines" command	Clifford Wolf	2016-12-15	1	-0/+60
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\| *	Bugfix in comment handling	Clifford Wolf	2016-12-13	1	-1/+1
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* \|	greenpak4: Updated GP_DCMP cell model	Andrew Zonenberg	2016-12-17	1	-2/+20
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* \|	greenpak: Fixes to GP_DCMP* blocks. Added GP_CLKBUF.	Andrew Zonenberg	2016-12-16	1	-5/+10
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* \|	greenpak4: Initial version of GP_DCMP skeleton (not yet usable). Changed ↵	Andrew Zonenberg	2016-12-15	1	-5/+24
\| \| \| \| \| \| \| \|	interface to GP_DCMPMUX
* \|	greenpak4: More fixups of GP_DCMPx cells	Andrew Zonenberg	2016-12-15	1	-9/+3
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* \|	greenpak4: And another typo :(	Andrew Zonenberg	2016-12-15	1	-1/+1
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* \|	greenpak4: Fixed another typo	Andrew Zonenberg	2016-12-15	1	-1/+1
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* \|	greenpak4: Fixed typo	Andrew Zonenberg	2016-12-15	1	-1/+1
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* \|	greenpak4: Cleaned up trailing spaces in cells_sim	Andrew Zonenberg	2016-12-14	1	-60/+60
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* \|	greenpak4: Added GP_DCMPREF / GP_DCMPMUX	Andrew Zonenberg	2016-12-14	1	-0/+23
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* \|	Merge https://github.com/cliffordwolf/yosys	Andrew Zonenberg	2016-12-12	7	-0/+153
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\| *	Added $anyconst support to AIGER back-end	Clifford Wolf	2016-12-11	1	-0/+7
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\| *	Merge branch 'LSS-USP-unit-test-structure'	Clifford Wolf	2016-12-11	6	-0/+146
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\| \| *	Some minor CodingReadme changes in unit test section	Clifford Wolf	2016-12-11	1	-10/+4
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\| \| *	Build hotfix in tests/unit/Makefile	Clifford Wolf	2016-12-11	1	-1/+1
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\| \| *	Improved unit test structure	rodrigosiqueira	2016-12-10	3	-16/+20
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	Signed-off-by: rodrigosiqueira <rodrigosiqueiramelo@gmail.com> Signed-off-by: chaws <18oliveira.charles@gmail.com> * Merged run-all-unitest inside unit-test target * Fixed Makefile dependencies * Updated documentation about unit test
\| \| *	Added explanation about configure and create test	rodrigosiqueira	2016-12-04	1	-0/+75
\| \| \| \| \| \| \| \| \| \| \| \|	Added explanation about configure unit test environment and how to add new unit tests
\| \| *	Added required structure to implement unit tests	rodrigosiqueira	2016-12-04	5	-0/+73
\| \|/ \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	Added modifications inside the main Makefile to refers the unit test Makefile. Added separated Makefile only for compiling unit tests. Added simple example of unit test. Signed-off-by: Charles Oliveira <18oliveira.charles@gmail.com> Signed-off-by: Pablo Alejandro <pabloabur@usp.br> Signed-off-by: Rodrigo Siqueira <siqueira@ime.usp.br>
* \|	Added GP_PWRDET block, BANDWIDTH_KHZ parameter to GP_ABUF	Andrew Zonenberg	2016-12-11	1	-1/+9
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* \|	greenpak4: Added support for inferred input/output inverters on latches	Andrew Zonenberg	2016-12-10	1	-4/+17
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* \|	greenpak4: Can now techmap inferred D latches (without set/reset or output ↵	Andrew Zonenberg	2016-12-10	3	-0/+17
\| \| \| \| \| \| \| \|	inverter)
* \|	greenpak4: Inverted D latch cells now have nQ instead of Q as output port ↵	Andrew Zonenberg	2016-12-10	1	-15/+15
\| \| \| \| \| \| \| \|	name for consistency
* \|	Added GP_DLATCH and GP_DLATCHI	Andrew Zonenberg	2016-12-05	1	-0/+18
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* \|	Initial implementation of techlib support for GreenPAK latches. ↵	Andrew Zonenberg	2016-12-05	2	-0/+120
\| \| \| \| \| \| \| \|	Instantiation only, no behavioral inference yet.
* \|	Updated help text for synth_greenpak4	Andrew Zonenberg	2016-12-05	1	-0/+2
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*	Added $assert/$assume support to AIGER back-end	Clifford Wolf	2016-12-03	3	-13/+54
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*	Improved yosys-smtbmc default -t/--assume-skipped for --cex and --aig	Clifford Wolf	2016-12-03	1	-2/+15
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*	Updated ABV to hg rev 8b555d9e67cf	Clifford Wolf	2016-12-01	1	-1/+1
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*	Added examples/aiger/	Clifford Wolf	2016-12-01	4	-0/+53
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*	Added "yosys-smtbmc --aig"	Clifford Wolf	2016-12-01	1	-6/+127
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*	Added support for partially initialized regs to smt2 back-end	Clifford Wolf	2016-12-01	1	-3/+15
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*	Added "write_aiger -zinit -symbols -vmap"	Clifford Wolf	2016-12-01	1	-30/+139
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*	Added "write_aiger" command	Clifford Wolf	2016-11-30	2	-0/+398
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*	Added "design -reset-vlog"	Clifford Wolf	2016-11-30	1	-7/+32
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*	Improved equiv_purge log output	Clifford Wolf	2016-11-29	1	-1/+1
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*	Bugfix in smt2 back-end for pure checker modules	Clifford Wolf	2016-11-28	1	-0/+4
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*	Added support for macros as include file names	Clifford Wolf	2016-11-28	1	-0/+2
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*	Bugfix in "read_verilog -D NAME=VAL" handling	Clifford Wolf	2016-11-28	1	-3/+3
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*	Removed shebang line from smtio.py, fixes #279	Clifford Wolf	2016-11-27	1	-1/+0
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*	Added wire start_offset and upto handling BLIF back-end	Clifford Wolf	2016-11-23	1	-1/+1
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*	Added wire start_offset and upto handling to splitnets cmd	Clifford Wolf	2016-11-23	1	-2/+8
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*	Merge pull request #274 from oldtopman/lcurses	Clifford Wolf	2016-11-22	1	-0/+5
\|\ \| \| \| \|	Added optional flag for linking curses with readline.
\| *	Added optional flag for linking curses with readline.	oldtopman	2016-11-21	1	-0/+5
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* \|	Added "yosys-smtbmc --append"	Clifford Wolf	2016-11-22	1	-2/+20
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*	Merge pull request #272 from AlexDaniel/master	Clifford Wolf	2016-11-19	1	-63/+64
\|\ \| \| \| \|	Markdownify README (№2)
\| *	Keep lines under 80 characters	Aleks-Daniel Jakimenko-Aleksejev	2016-11-19	1	-10/+11
\| \| \| \| \| \| \| \| \| \|	Recent README changes added some characters to existing lines, which made them longer than 80 characters. This commit fixes that.
\| *	Markdownify README even further	Aleks-Daniel Jakimenko-Aleksejev	2016-11-19	1	-60/+60
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* \|	Improved ABC default scripts	Clifford Wolf	2016-11-19	1	-17/+34
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