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author | Clifford Wolf <clifford@clifford.at> | 2016-12-11 13:48:18 +0100 |
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committer | Clifford Wolf <clifford@clifford.at> | 2016-12-11 13:48:18 +0100 |
commit | a61c88f12215eb8bfa1db62aec7c2c95bb3cc702 (patch) | |
tree | b09802257c16c2998f89169e1d4d12dbe7821044 | |
parent | 8a717ae1dc58b7c979be57db5e7fa66804828aa6 (diff) | |
download | yosys-a61c88f12215eb8bfa1db62aec7c2c95bb3cc702.tar.gz yosys-a61c88f12215eb8bfa1db62aec7c2c95bb3cc702.tar.bz2 yosys-a61c88f12215eb8bfa1db62aec7c2c95bb3cc702.zip |
Added $anyconst support to AIGER back-end
-rw-r--r-- | backends/aiger/aiger.cc | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/backends/aiger/aiger.cc b/backends/aiger/aiger.cc index aefe5cf43..ab1fba6f1 100644 --- a/backends/aiger/aiger.cc +++ b/backends/aiger/aiger.cc @@ -163,6 +163,13 @@ struct AigerWriter continue; } + if (cell->type == "$anyconst") + { + for (auto bit : sigmap(cell->getPort("\\Y"))) + ff_map[bit] = bit; + continue; + } + log_error("Unsupported cell type: %s (%s)\n", log_id(cell->type), log_id(cell)); } |