iCE40/yosys - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	Fixed handling of undef values in POS cells in ConstEval	Clifford Wolf	2013-11-06	1	-3/+1
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*	Fixed handling of undef values in MUX select input in ConstEval	Clifford Wolf	2013-11-06	1	-32/+58
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*	Added correct RTL undef handling to eval vloghammer mode	Clifford Wolf	2013-11-06	1	-3/+17
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*	Added eval -vloghammer_report mode	Clifford Wolf	2013-11-06	2	-4/+145
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*	Added support for "keep" attributes on wires	Clifford Wolf	2013-11-05	2	-3/+8
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*	Fixed sign handling in const eval of sshl and sshr	Clifford Wolf	2013-11-05	1	-2/+6
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*	Makefile DESTDIR default (/usr/local) without quotes	Clifford Wolf	2013-11-04	1	-1/+1
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*	Another fix for early width and sign detection in ast simplifier	Clifford Wolf	2013-11-04	1	-2/+3
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*	Merge branch 'master' of github.com:cliffordwolf/yosys	Clifford Wolf	2013-11-04	1	-4/+7
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\| *	Merge pull request #16 from mschmoelzer/master	Clifford Wolf	2013-11-04	1	-4/+7
\| \|\ \| \| \| \| \| \|	Allow setting of installation destination via DESTDIR variable in Makefi...
\| \| *	Allow setting of installation destination via DESTDIR variable in Makefile	Martin Schmölzer	2013-11-04	1	-4/+7
\| \|/ \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	This is useful when packaging yosys, as some Linux distributions do not allow the package management system to install files in /usr/local [1][2]. [1] https://wiki.archlinux.org/index.php/Arch_Packaging_Standards [2] http://fedoraproject.org/wiki/Packaging:Guidelines Signed-off-by: Martin Schmölzer <martin.schmoelzer@student.tuwien.ac.at>
* \|	Fixed const folding of ternary operator	Clifford Wolf	2013-11-04	1	-4/+5
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* \|	Use proper bit width ans sign extension for const folding	Clifford Wolf	2013-11-04	1	-17/+18
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*	Improved comments on topological sort in edif backend	Clifford Wolf	2013-11-04	1	-3/+4
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*	Fixes for early width and sign detection in ast simplifier	Clifford Wolf	2013-11-04	1	-1/+2
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*	further improved early width and sign detection in ast simplifier	Clifford Wolf	2013-11-04	2	-11/+117
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*	Added simple topological sort to edif backend	Clifford Wolf	2013-11-03	1	-2/+30
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*	Write yosys version to output files	Clifford Wolf	2013-11-03	7	-9/+13
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*	Merge branch 'master' of github.com:cliffordwolf/yosys	Clifford Wolf	2013-11-03	2	-3/+62
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\| *	Added resolution of positional arguments to hierarchy pass	Clifford Wolf	2013-11-03	1	-0/+57
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\| *	Ignore explicit unconnected ports in intersynth backend	Clifford Wolf	2013-11-03	1	-3/+5
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* \|	Fixed detectSignWidthWorker (ast frontend) for AST_CONCAT	Clifford Wolf	2013-11-03	1	-1/+1
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* \|	Behavior should be identical now to rev. 0b4a64ac6adbd6 (next: testing ↵	Clifford Wolf	2013-11-02	3	-8/+12
\| \| \| \| \| \| \| \|	before constfold fixes)
* \|	Added roadmap to readme file	Clifford Wolf	2013-11-02	1	-0/+9
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* \|	Various ast changes for early expression width detection (prep for constfold ↵	Clifford Wolf	2013-11-02	5	-30/+146
\| \| \| \| \| \| \| \|	fixes)
* \|	Added DFFSR cell to techlibs/cmos/cmos_cells.lib	Clifford Wolf	2013-10-31	2	-0/+26
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* \|	Added placeholder check to dfflibmap and cleaned up some other placeholder ↵	Clifford Wolf	2013-10-31	3	-4/+4
\| \| \| \| \| \| \| \|	checks
* \|	Changed MiniSAT feater defines again	Clifford Wolf	2013-10-31	1	-2/+3
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*	Added paragraph to README file to avoid mycells.lib confusion	Clifford Wolf	2013-10-31	1	-0/+3
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*	README file typo fix	Clifford Wolf	2013-10-31	1	-1/+1
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*	Some additions to the README file	Clifford Wolf	2013-10-31	1	-0/+19
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*	Fixed ezminisat C++ errors: undef PRIi64	Clifford Wolf	2013-10-30	1	-1/+2
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*	Added detection for endless recursion in fsm_detect pass	Clifford Wolf	2013-10-30	1	-4/+15
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*	Fixed help message typo (memory pass)	Clifford Wolf	2013-10-30	1	-1/+1
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*	Added -format option to splitnets	Clifford Wolf	2013-10-29	1	-1/+16
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*	Merge pull request #12 from jameswalmsley/master	Clifford Wolf	2013-10-27	4	-0/+56
\|\ \| \| \| \|	[EXAMPLES] Ported the mojo counter example to Zynq ZED board.
\| *	[EXAMPLES] Ported the mojo counter example to Zynq ZED board.	James Walmsley	2013-10-27	4	-0/+56
\|/ \| \| \|	Will be adding a tutorial on this to verilog.james.walms.co.uk in a few days.
*	Fixed get_share_file_name() for installed yosys	Clifford Wolf	2013-10-27	1	-2/+3
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*	Cleanups in xilinx examples	Clifford Wolf	2013-10-27	3	-144/+28
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*	Added synth_xilinx command	Clifford Wolf	2013-10-27	2	-0/+219
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*	Added API and Makefile rules for share/ files	Clifford Wolf	2013-10-27	4	-0/+26
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*	Added design->full_selection() helper method	Clifford Wolf	2013-10-27	1	-0/+3
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*	Moved simple xilinx counter sim example to subdir	Clifford Wolf	2013-10-27	3	-0/+0
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*	Xilinx mojo_counter example is now working	Clifford Wolf	2013-10-27	3	-4/+9
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*	Fixed hex string generation bug in edif backend	Clifford Wolf	2013-10-27	1	-4/+4
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*	Renamed techlibs/xilinx7 to techlibs/xilinx	Clifford Wolf	2013-10-26	8	-0/+0
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*	Improved xilinx mojo_counter example	Clifford Wolf	2013-10-26	2	-2/+5
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*	Added support for i/o buffers to iopadmap	Clifford Wolf	2013-10-26	1	-10/+35
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*	Added another xilinx example (not funcional yet)	Clifford Wolf	2013-10-26	4	-0/+101
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*	Added support for sr flip-flops to dfflibmap	Clifford Wolf	2013-10-24	1	-3/+168
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