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| * | | | | | | | | | | | | | | | | CleanupEddie Hung2019-09-051-5/+2
| * | | | | | | | | | | | | | | | | Support CEAEddie Hung2019-09-052-9/+34
| * | | | | | | | | | | | | | | | | Get rid of sigBset tooEddie Hung2019-09-042-12/+10
| * | | | | | | | | | | | | | | | | Get rid of sigAsetEddie Hung2019-09-041-10/+14
| * | | | | | | | | | | | | | | | | Get rid of sigPusedEddie Hung2019-09-042-16/+13
| * | | | | | | | | | | | | | | | | Compute sigP properlyEddie Hung2019-09-041-1/+1
| * | | | | | | | | | | | | | | | | Merge remote-tracking branch 'origin/eddie/peepopt_dffmuxext' into xc7dspEddie Hung2019-09-044-0/+68
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| * \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ Merge remote-tracking branch 'origin/master' into xc7dspEddie Hung2019-09-0412-24/+87
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| * | | | | | | | | | | | | | | | | | | Support CEMEddie Hung2019-09-042-9/+33
| * | | | | | | | | | | | | | | | | | | st.ffP from if to assertEddie Hung2019-09-031-1/+2
| * | | | | | | | | | | | | | | | | | | Rename muxAB to postAddMuxEddie Hung2019-09-032-44/+25
| * | | | | | | | | | | | | | | | | | | Use choices for addAB, now called postAddEddie Hung2019-09-032-46/+29
| * | | | | | | | | | | | | | | | | | | Add support for load value into DSP48E1.PEddie Hung2019-09-032-30/+47
| * | | | | | | | | | | | | | | | | | | Process post-adder first since C could be used for load-PEddie Hung2019-09-031-18/+22
| * | | | | | | | | | | | | | | | | | | Use feedback path for MACCEddie Hung2019-09-031-15/+21
| * | | | | | | | | | | | | | | | | | | Fine tune xilinx_dsp pattern matcherEddie Hung2019-08-301-14/+18
| * | | | | | | | | | | | | | | | | | | Add macc test, with equiv_opt not currently passingEddie Hung2019-08-302-0/+54
| * | | | | | | | | | | | | | | | | | | autoremove ffMEddie Hung2019-08-301-0/+1
| * | | | | | | | | | | | | | | | | | | Remove debugEddie Hung2019-08-301-1/+0
| * | | | | | | | | | | | | | | | | | | ffM before addABEddie Hung2019-08-301-1/+1
| * | | | | | | | | | | | | | | | | | | Another oopsEddie Hung2019-08-301-1/+1
| * | | | | | | | | | | | | | | | | | | Update commented outEddie Hung2019-08-301-1/+1
| * | | | | | | | | | | | | | | | | | | Update test for ffMEddie Hung2019-08-301-2/+2
| * | | | | | | | | | | | | | | | | | | Add support for ffMEddie Hung2019-08-302-3/+48
| * | | | | | | | | | | | | | | | | | | Update commentEddie Hung2019-08-301-1/+1
| * | | | | | | | | | | | | | | | | | | Add mul_unsigned testEddie Hung2019-08-302-0/+41
| * | | | | | | | | | | | | | | | | | | Missing dep for test_pmgenEddie Hung2019-08-301-1/+1
| * | | | | | | | | | | | | | | | | | | Merge remote-tracking branch 'origin/master' into xc7dspEddie Hung2019-08-3061-367/+1765
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| * | | | | | | | | | | | | | | | | | | | New pmgen requires explicit acceptEddie Hung2019-08-301-0/+2
| * | | | | | | | | | | | | | | | | | | | Merge branch 'xc7dsp' of github.com:YosysHQ/yosys into xc7dspEddie Hung2019-08-3070-562/+3098
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| | * \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ Merge branch 'master' into xc7dspDavid Shah2019-08-30190-4390/+8848
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| * | | | | | | | | | | | | | | | | | | | | | Fix compile errorEddie Hung2019-08-202-8/+14
| * | | | | | | | | | | | | | | | | | | | | | Merge remote-tracking branch 'origin/master' into xc7dspEddie Hung2019-08-20133-2288/+4174
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| * | | | | | | | | | | | | | | | | | | | | | | xilinx_dsp to be sensitive to keep attributeEddie Hung2019-08-151-1/+14
| * | | | | | | | | | | | | | | | | | | | | | | SimplifyEddie Hung2019-08-151-4/+2
| * | | | | | | | | | | | | | | | | | | | | | | Merge remote-tracking branch 'origin/master' into xc7dspEddie Hung2019-08-1526-2242/+2277
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| * \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ Merge branch 'xc7dsp' of github.com:YosysHQ/yosys into xc7dspEddie Hung2019-08-151-1/+5
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| | * | | | | | | | | | | | | | | | | | | | | | | xilinx: Rework labels for faster Verilator testingDavid Shah2019-08-131-1/+5
| * | | | | | | | | | | | | | | | | | | | | | | | ffH -> ffFJKGEddie Hung2019-08-152-15/+15
| * | | | | | | | | | | | | | | | | | | | | | | | Fixes for reverting SigSpec helper functionsEddie Hung2019-08-142-10/+14
| * | | | | | | | | | | | | | | | | | | | | | | | Perform C -> PCIN optimisation after pattern matcherEddie Hung2019-08-132-19/+72
| * | | | | | | | | | | | | | | | | | | | | | | | Revert changes to RTLIL::SigSpec methodsEddie Hung2019-08-134-15/+36
| * | | | | | | | | | | | | | | | | | | | | | | | Only swap ports if $mul and not $__mulEddie Hung2019-08-131-1/+1
| * | | | | | | | | | | | | | | | | | | | | | | | Add assign PCOUT = P to DSP48E1Eddie Hung2019-08-131-0/+2
| * | | | | | | | | | | | | | | | | | | | | | | | Rename to XilinxDspPassEddie Hung2019-08-131-3/+3
| * | | | | | | | | | | | | | | | | | | | | | | | Add DSP_A_MAXWIDTH_PARTIAL, refactorEddie Hung2019-08-132-145/+111
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| * | | | | | | | | | | | | | | | | | | | | | | Merge remote-tracking branch 'origin/master' into xc7dspEddie Hung2019-08-1276-551/+823
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| * | | | | | | | | | | | | | | | | | | | | | | | Check nusers of DSP output, not whole flopEddie Hung2019-08-091-1/+1
| * | | | | | | | | | | | | | | | | | | | | | | | Improve ice40_dsp for non-fully-32-bit addersEddie Hung2019-08-091-3/+8
| * | | | | | | | | | | | | | | | | | | | | | | | Add wreduce to synth_ice40 -dsp as wellEddie Hung2019-08-091-0/+1
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