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| * | | | | | | | | | | | | | | | | | Python passes are now looked for in share/plugins and can be added by ↵Benedikt Tutzer2018-08-202-24/+5
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| * | | | | | | | | | | | | | | | | | Fixed issue when using a python plugin in the yosys shellBenedikt Tutzer2018-08-203-4/+28
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| * | | | | | | | | | | | | | | | | | Python Passes can now be added with the -m option or with the plugin ↵Benedikt Tutzer2018-08-165-2/+160
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | command. There are still issues when run in shell mode, but they can be used just fine in a python script
| * | | | | | | | | | | | | | | | | | Added Wrappers for:Benedikt Tutzer2018-08-134-144/+2925
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | -IdString -Const -CaseRule -SwitchRule -SyncRule -Process -SigChunk -SigBit -SigSpec With all their member functions as well as the remaining member functions for Cell, Wire, Module and Design and static functions of rtlil.h
| * | | | | | | | | | | | | | | | | | Saving id and pointer to c++ object. Object is valid only if both id and ↵Benedikt Tutzer2018-08-011-8/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pointer match the pair saved in the corresponding map in kernel/rtlil.cc. Otherwise, the object was destroyed in c++ and should not be accessed any more
| * | | | | | | | | | | | | | | | | | Setup is called automatically when the module is loaded, shutdown when ↵Benedikt Tutzer2018-08-011-16/+19
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| * | | | | | | | | | | | | | | | | | Cleaned up commentsBenedikt Tutzer2018-08-011-9/+3
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| * | | | | | | | | | | | | | | | | | removed unused library and already present compiler flagBenedikt Tutzer2018-08-011-3/+3
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| * | | | | | | | | | | | | | | | | | Added Monitor class that can monitor all changes in a Design or in a ModuleBenedikt Tutzer2018-07-101-0/+119
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| * | | | | | | | | | | | | | | | | | added destructors for wires and cellsBenedikt Tutzer2018-07-102-1/+16
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| * | | | | | | | | | | | | | | | | | removed debug outputBenedikt Tutzer2018-07-091-1/+0
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| * | | | | | | | | | | | | | | | | | commands can now be run on arbitrary designs, not only on the active oneBenedikt Tutzer2018-07-091-0/+10
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| * | | | | | | | | | | | | | | | | | multiple designs can now exist independent from each other. ↵Benedikt Tutzer2018-07-093-45/+118
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cells/Wires/Modules can now move to a different parent without referencing issues
| * | | | | | | | | | | | | | | | | | Introduced namespace and removed class-prefixes to increase readabilityBenedikt Tutzer2018-06-281-163/+165
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| * | | | | | | | | | | | | | | | | | changed references from hash-ids to IdString namesBenedikt Tutzer2018-06-281-64/+32
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| * | | | | | | | | | | | | | | | | | added wrappers for Design, Modules, Cells and WiresBenedikt Tutzer2018-06-252-0/+245
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| * | | | | | | | | | | | | | | | | | added ENABLE_PYTHON option in build environmentBenedikt Tutzer2018-06-221-1/+10
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* | | | | | | | | | | | | | | | | | | Merge pull request #941 from Wren6991/sim_lib_io_clkeClifford Wolf2019-04-221-10/+19
|\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ice40 cells_sim.v: update clock enable behaviour based on hardware experiments
| * | | | | | | | | | | | | | | | | | | ice40 cells_sim.v: SB_IO: update clock enable behaviour based on hardware ↵Luke Wren2019-04-211-10/+19
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* | | | | | | | | | | | | | | | | | | | Merge branch 'dh73-master'Clifford Wolf2019-04-2210-10/+458
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| * | | | | | | | | | | | | | | | | | | | Merge branch 'master' of https://github.com/dh73/yosys_gowin into dh73-masterClifford Wolf2019-04-2210-10/+458
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| * | | | | | | | | | | | | | | | | | | | GoWin enablement: DRAM, initial BRAM, DRAM init, DRAM sim and synth_gowin flowDiego2019-04-1210-11/+459
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* | | | | | | | | | | | | | | | | | | | | Re-added clean after techmap in synth_xilinxClifford Wolf2019-04-221-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | | | | | | | | | | | | | | | | | Merge pull request #916 from YosysHQ/map_cells_before_map_lutsClifford Wolf2019-04-221-10/+10
|\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | |_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|/ | |/| | | | | | | | | | | | | | | | | | | synth_xilinx to map_cells before map_luts
| * | | | | | | | | | | | | | | | | | | | Merge branch 'master' into map_cells_before_map_lutsEddie Hung2019-04-2147-190/+444
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| * | | | | | | | | | | | | | | | | | | Missing techmap entry in helpEddie Hung2019-04-041-0/+1
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| * | | | | | | | | | | | | | | | | | synth_xilinx to map_cells before map_lutsEddie Hung2019-04-041-12/+12
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* | | | | | | | | | | | | | | | | | | Merge pull request #911 from mmicko/gowin-nobramClifford Wolf2019-04-221-1/+1
|\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make nobram false by default for gowin
| * | | | | | | | | | | | | | | | | | | Make nobram false by default for gowinMiodrag Milanovic2019-04-021-1/+1
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* | | | | | | | | | | | | | | | | | | | Merge pull request #909 from zachjs/masterClifford Wolf2019-04-223-1/+68
|\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | support repeat loops with constant repeat counts outside of constant functions
| * | | | | | | | | | | | | | | | | | | | support repeat loops with constant repeat counts outside of constant functionsZachary Snow2019-04-093-1/+68
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* | | | | | | | | | | | | | | | | | | | | Merge pull request #944 from YosysHQ/clifford/pmux2shiftxClifford Wolf2019-04-224-0/+894
|\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | |_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|/ | |/| | | | | | | | | | | | | | | | | | | Add pmux2shiftx command
| * | | | | | | | | | | | | | | | | | | | Auto-initialize OnehotDatabase on-demand in pmux2shiftx.ccClifford Wolf2019-04-201-4/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * | | | | | | | | | | | | | | | | | | | Add "onehot" pass, improve "pmux2shiftx" onehot handlingClifford Wolf2019-04-201-13/+404
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * | | | | | | | | | | | | | | | | | | | Improve "pmux2shiftx"Clifford Wolf2019-04-202-11/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * | | | | | | | | | | | | | | | | | | | Fix some typosClifford Wolf2019-04-201-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * | | | | | | | | | | | | | | | | | | | Improvements in "pmux2shiftx"Clifford Wolf2019-04-202-13/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * | | | | | | | | | | | | | | | | | | | Improvements in pmux2shiftxClifford Wolf2019-04-203-33/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * | | | | | | | | | | | | | | | | | | | Add test for pmux2shiftxClifford Wolf2019-04-202-0/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * | | | | | | | | | | | | | | | | | | | Improve pmux2shift ctrl permutation finderClifford Wolf2019-04-201-27/+114
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * | | | | | | | | | | | | | | | | | | | Complete rewrite of pmux2shiftxClifford Wolf2019-04-201-27/+265
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * | | | | | | | | | | | | | | | | | | | Import initial pmux2shiftx from eddiehClifford Wolf2019-04-202-0/+82
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | | | | | | | | | | | | | | | | | Merge pull request #945 from YosysHQ/clifford/libwbClifford Wolf2019-04-229-39/+124
|\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | |_|_|_|_|/ / / / / / / / / / / / / / / / |/| | | | | | | | | | | | | | | | | | | | New behavior for read_verilog handling of whiteboxes
| * | | | | | | | | | | | | | | | | | | | Disable blackbox detection in techmap filesClifford Wolf2019-04-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * | | | | | | | | | | | | | | | | | | | Fix testsClifford Wolf2019-04-212-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * | | | | | | | | | | | | | | | | | | | Add "noblackbox" attributeClifford Wolf2019-04-212-18/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * | | | | | | | | | | | | | | | | | | | New behavior for front-end handling of whiteboxesClifford Wolf2019-04-206-34/+103
|/ / / / / / / / / / / / / / / / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | | | | | | | | | | | | | | | | Merge pull request #943 from YosysHQ/clifford/whiteboxClifford Wolf2019-04-2027-55/+157
|\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | |_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|_|/ / |/| | | | | | | | | | | | | | | | | | | [WIP] Add "whitebox" attribute, add "read_verilog -wb"
| * | | | | | | | | | | | | | | | | | | Add "techmap -wb", use in formal flowsClifford Wolf2019-04-203-6/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * | | | | | | | | | | | | | | | | | | Check blackbox attribute in techmap/simplemapClifford Wolf2019-04-202-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
generated by cgit v1.2.3 (git 2.25.1) at 2025-04-10 11:02:38 +0000