iCE40/yosys - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	Merge https://github.com/cliffordwolf/yosys	Andrew Zonenberg	2016-12-23	5	-4/+44
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\| *	Simplified log_spacer() code	Clifford Wolf	2016-12-23	1	-6/+2
\| *	Added "yosys -W regex"	Clifford Wolf	2016-12-22	3	-2/+44
\| *	Added AIGER back-end to automatic back-end detection	Clifford Wolf	2016-12-21	1	-0/+2
\| *	Updated ABC to hg rev a4872e22c646	Clifford Wolf	2016-12-21	1	-1/+1
\| *	Updated ABC to hg rev 8bab2eedbba4	Clifford Wolf	2016-12-21	1	-1/+1
* \|	greenpak4: Added INT pin to GP_SPI	Andrew Zonenberg	2016-12-21	1	-1/+3
* \|	greenpak4: removed unused MISO pin from GP_SPI	Andrew Zonenberg	2016-12-21	1	-1/+0
* \|	greenpak4: Removed SPI_BUFFER parameter	Andrew Zonenberg	2016-12-20	1	-1/+0
* \|	greenpak4: replaced MOSI/MISO with single one-way SDAT pin	Andrew Zonenberg	2016-12-20	1	-2/+1
* \|	greenpak4: Changed port names on GP_SPI for clarity	Andrew Zonenberg	2016-12-20	1	-4/+4
* \|	greenpak4: Initial implementation of GP_SPI cell	Andrew Zonenberg	2016-12-20	1	-0/+27
* \|	Merge https://github.com/cliffordwolf/yosys	Andrew Zonenberg	2016-12-17	2	-1/+61
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\| *	Added "verilog_defines" command	Clifford Wolf	2016-12-15	1	-0/+60
\| *	Bugfix in comment handling	Clifford Wolf	2016-12-13	1	-1/+1
* \|	greenpak4: Updated GP_DCMP cell model	Andrew Zonenberg	2016-12-17	1	-2/+20
* \|	greenpak: Fixes to GP_DCMP* blocks. Added GP_CLKBUF.	Andrew Zonenberg	2016-12-16	1	-5/+10
* \|	greenpak4: Initial version of GP_DCMP skeleton (not yet usable). Changed inte...	Andrew Zonenberg	2016-12-15	1	-5/+24
* \|	greenpak4: More fixups of GP_DCMPx cells	Andrew Zonenberg	2016-12-15	1	-9/+3
* \|	greenpak4: And another typo :(	Andrew Zonenberg	2016-12-15	1	-1/+1
* \|	greenpak4: Fixed another typo	Andrew Zonenberg	2016-12-15	1	-1/+1
* \|	greenpak4: Fixed typo	Andrew Zonenberg	2016-12-15	1	-1/+1
* \|	greenpak4: Cleaned up trailing spaces in cells_sim	Andrew Zonenberg	2016-12-14	1	-60/+60
* \|	greenpak4: Added GP_DCMPREF / GP_DCMPMUX	Andrew Zonenberg	2016-12-14	1	-0/+23
* \|	Merge https://github.com/cliffordwolf/yosys	Andrew Zonenberg	2016-12-12	7	-0/+153
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\| *	Added $anyconst support to AIGER back-end	Clifford Wolf	2016-12-11	1	-0/+7
\| *	Merge branch 'LSS-USP-unit-test-structure'	Clifford Wolf	2016-12-11	6	-0/+146
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\| \| *	Some minor CodingReadme changes in unit test section	Clifford Wolf	2016-12-11	1	-10/+4
\| \| *	Build hotfix in tests/unit/Makefile	Clifford Wolf	2016-12-11	1	-1/+1
\| \| *	Improved unit test structure	rodrigosiqueira	2016-12-10	3	-16/+20
\| \| *	Added explanation about configure and create test	rodrigosiqueira	2016-12-04	1	-0/+75
\| \| *	Added required structure to implement unit tests	rodrigosiqueira	2016-12-04	5	-0/+73
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* \|	Added GP_PWRDET block, BANDWIDTH_KHZ parameter to GP_ABUF	Andrew Zonenberg	2016-12-11	1	-1/+9
* \|	greenpak4: Added support for inferred input/output inverters on latches	Andrew Zonenberg	2016-12-10	1	-4/+17
* \|	greenpak4: Can now techmap inferred D latches (without set/reset or output in...	Andrew Zonenberg	2016-12-10	3	-0/+17
* \|	greenpak4: Inverted D latch cells now have nQ instead of Q as output port nam...	Andrew Zonenberg	2016-12-10	1	-15/+15
* \|	Added GP_DLATCH and GP_DLATCHI	Andrew Zonenberg	2016-12-05	1	-0/+18
* \|	Initial implementation of techlib support for GreenPAK latches. Instantiation...	Andrew Zonenberg	2016-12-05	2	-0/+120
* \|	Updated help text for synth_greenpak4	Andrew Zonenberg	2016-12-05	1	-0/+2
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*	Added $assert/$assume support to AIGER back-end	Clifford Wolf	2016-12-03	3	-13/+54
*	Improved yosys-smtbmc default -t/--assume-skipped for --cex and --aig	Clifford Wolf	2016-12-03	1	-2/+15
*	Updated ABV to hg rev 8b555d9e67cf	Clifford Wolf	2016-12-01	1	-1/+1
*	Added examples/aiger/	Clifford Wolf	2016-12-01	4	-0/+53
*	Added "yosys-smtbmc --aig"	Clifford Wolf	2016-12-01	1	-6/+127
*	Added support for partially initialized regs to smt2 back-end	Clifford Wolf	2016-12-01	1	-3/+15
*	Added "write_aiger -zinit -symbols -vmap"	Clifford Wolf	2016-12-01	1	-30/+139
*	Added "write_aiger" command	Clifford Wolf	2016-11-30	2	-0/+398
*	Added "design -reset-vlog"	Clifford Wolf	2016-11-30	1	-7/+32
*	Improved equiv_purge log output	Clifford Wolf	2016-11-29	1	-1/+1
*	Bugfix in smt2 back-end for pure checker modules	Clifford Wolf	2016-11-28	1	-0/+4