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Merge pull request #2594 from zachjs/func-arg-width
whitequark
2021-02-23
10
-47
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+124
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verilog: fix sizing of constant args for tasks/functions
Zachary Snow
2021-02-21
10
-47
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+124
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int -> bool
Robert Baruch
2021-02-23
1
-2
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+2
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Adds is_wire to SigBit and SigChunk
Robert Baruch
2021-02-23
1
-0
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+3
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machxo2: Switch to LUT4 sim model which propagates less undefined/don't care ...
William D. Jones
2021-02-23
2
-12
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+6
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machxo2: Update tribuf test to reflect active-low OE.
William D. Jones
2021-02-23
1
-1
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+2
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machxo2: Add experimental status to help.
William D. Jones
2021-02-23
1
-1
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+1
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machxo2: Add DCCA and DCMA blackbox primitives.
William D. Jones
2021-02-23
1
-0
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+17
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machxo2: Fix reversed interpretation of REG_SD config bits.
William D. Jones
2021-02-23
1
-2
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+2
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machxo2: Tristate is active-low.
William D. Jones
2021-02-23
2
-5
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+5
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machxo2: Fix typos in FACADE_FF sim model.
William D. Jones
2021-02-23
1
-5
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+4
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machxo2: Fix naming of TRELLIS_IO ports to match PIO pins in routing graph.
William D. Jones
2021-02-23
2
-6
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+6
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machxo2: Improve help_mode output in synth_machxo2.
William D. Jones
2021-02-23
1
-5
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+5
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machxo2: Use attrmvcp pass to move LOC and src attributes from ports/wires to...
William D. Jones
2021-02-23
2
-1
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+17
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machxo2: Add missing OSCH oscillator primitive.
William D. Jones
2021-02-23
1
-0
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+10
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machxo2: Add believed-to-be-correct tribuf test.
William D. Jones
2021-02-23
1
-0
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+9
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machxo2: Add passing fsm, mux, and shifter tests.
William D. Jones
2021-02-23
3
-0
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+65
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machxo2: Add add_sub test. Fix tests to include FACADE_IO primitives.
William D. Jones
2021-02-23
3
-3
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+11
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machxo2: Add -noiopad option to synth_machxo2.
William D. Jones
2021-02-23
1
-2
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+11
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machxo2: Use correct INITVAL for LUT1 in FACADE_SLICE.
William D. Jones
2021-02-23
1
-1
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+1
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machxo2: Fix cells_sim typo where OFX1 was multiply-driven.
William D. Jones
2021-02-23
1
-1
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+1
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machxo2: synth_machxo2 now maps ports to FACADE_IO.
William D. Jones
2021-02-23
2
-0
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+12
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machxo2: Add initial value for Q in FACADE_FF.
William D. Jones
2021-02-23
1
-0
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+2
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machxo2: Add FACADE_IO simulation model. More comments on models.
William D. Jones
2021-02-23
1
-0
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+25
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machxo2: Add FACADE_SLICE simulation model.
William D. Jones
2021-02-23
1
-0
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+83
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machxo2: Improve FACADE_FF simulation model.
William D. Jones
2021-02-23
1
-12
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+20
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machxo2: Improve LUT4 techmap. Use same output port name for LUT4 as Lattice.
William D. Jones
2021-02-23
2
-4
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+4
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machxo2: Add dffe test.
William D. Jones
2021-02-23
1
-0
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+9
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machxo2: Add dff.ys test, fix another cells_map.v typo.
William D. Jones
2021-02-23
2
-1
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+11
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machxo2: Fix more oversights in machxo2 models. logic.ys test passes.
William D. Jones
2021-02-23
2
-2
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+6
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machxo2: Add test/arch/machxo2 directory (test does not pass).
William D. Jones
2021-02-23
4
-0
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+15
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machxo2: Fix typos. test/arch/run-test.sh passes.
William D. Jones
2021-02-23
2
-2
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+2
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machxo2: Create basic techlibs and synth_machxo2 pass.
William D. Jones
2021-02-23
4
-0
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+320
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frontend: json: parse negative values
Karol Gugala
2021-02-23
1
-2
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+10
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assertpmux: Fix crash on unused $pmux output.
Marcelina Kościelnicka
2021-02-22
2
-1
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+19
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Merge pull request #2586 from zachjs/tern-recurse
whitequark
2021-02-21
5
-19
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+195
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verilog: support recursive functions using ternary expressions
Zachary Snow
2021-02-12
5
-19
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+195
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Merge pull request #2591 from zachjs/verilog-preproc-unapplied
whitequark
2021-02-21
3
-1
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+32
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verilog: error on macro invocations with missing argument lists
Zachary Snow
2021-02-19
3
-1
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+32
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Bump version
Yosys Bot
2021-02-18
1
-1
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+1
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Merge pull request #2590 from RobertBaruch/fix_fast_sop_mode
Claire Xen
2021-02-17
1
-1
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+1
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Fixes command line for abc pass in -fast -sop mode
Robert Baruch
2021-02-16
1
-1
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+1
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Bump version
Yosys Bot
2021-02-16
1
-1
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+1
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Merge pull request #2574 from dh73/master
Claire Xen
2021-02-15
1
-0
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+5
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Accept disable case for SVA liveness properties.
Diego H
2021-02-04
1
-0
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+5
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Bump version
Yosys Bot
2021-02-13
1
-1
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+1
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Merge pull request #2585 from YosysHQ/dave/nexus-dotproduct
gatecat
2021-02-12
1
-0
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+115
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nexus: Add MULTADDSUB9X9WIDE sim model
David Shah
2020-12-08
1
-0
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+115
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Ganulate Verific support
Miodrag Milanovic
2021-02-12
1
-8
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+16
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Bump version
Yosys Bot
2021-02-12
1
-1
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+1
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