iCE40/yosys - clone of https://github.com/YosysHQ/yosys

	Commit message (Expand)	Author	Age	Files	Lines
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* \| \|	Change the type of current_module to Module	Rupert Swarbrick	2021-05-13	2	-24/+26
* \| \|	Use range-based for loop in AST::process	Rupert Swarbrick	2021-05-13	1	-21/+21
* \| \|	Add missing parameters for MULT18X18D and ALU54B to ECP5 techlib.	Adam Greig	2021-05-12	1	-0/+22
* \| \|	sv: check validity of package end label	Zachary Snow	2021-05-10	2	-0/+17
* \| \|	blif: Use library cells' start_offset and upto for wideports.	Marcelina Kościelnicka	2021-05-08	4	-10/+54
* \| \|	connect: Add -assert option, fix non-working sigmap.	Marcelina Kościelnicka	2021-05-08	1	-4/+24
* \| \|	opt_dff: Fix NOT gates wired in reverse.	Marcelina Kościelnicka	2021-05-04	2	-10/+15
* \| \|	Merge pull request #2738 from mdko/xilinx-blif	Miodrag Milanović	2021-04-27	1	-1/+1
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\| * \| \|	Fix use of blif name in synth_xilinx command	Michael Christensen	2021-04-27	1	-1/+1
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* \| \|	Merge pull request #2737 from YosysHQ/claire/fix2736	Claire Xen	2021-04-26	1	-0/+4
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\| * \| \|	Remove duplicates from conns array in JSON front-end, fixes #2736	Claire Xenia Wolf	2021-04-26	1	-0/+4
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* \| \|	Merge pull request #2669 from YosysHQ/claire/ice40defaults	Claire Xen	2021-04-21	2	-26/+62
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\| * \| \|	Add default assignments to other SB_* simulation models	Claire Xenia Wolf	2021-04-20	1	-24/+44
\| * \| \|	Add default assignments to SB_LUT4	Claire Xenia Wolf	2021-04-20	2	-2/+18
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* \| \|	quicklogic: ABC9 synthesis	Lofty	2021-04-17	12	-22/+97
* \| \|	sf2: fix name of AND modules	Stefan Riesenberger	2021-04-09	1	-3/+3
* \| \|	Merge pull request #2724 from whitequark/flatten-rewrite-memwr-memid	whitequark	2021-04-09	1	-0/+3
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\| * \| \|	flatten: rewrite memid in memwr actions.	whitequark	2021-04-09	1	-0/+3
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* \| \|	preproc: test coverage for #2712	Zachary Snow	2021-03-30	3	-0/+18
* \| \|	equiv: Suggest running async2sync or clk2fflogic where appropriate.	Marcelina Kościelnicka	2021-03-30	2	-3/+10
* \| \|	verilog: revise hot comment warnings	Zachary Snow	2021-03-30	1	-6/+21
* \| \|	abc9: uniquify blackboxes like whiteboxes (#2695)	Eddie Hung	2021-03-29	2	-11/+62
* \| \|	abc9: fix SCC issues (#2694)	Eddie Hung	2021-03-29	9	-45/+94
* \| \|	Bump version	Marcelina Kościelnicka	2021-03-30	1	-1/+1
* \| \|	preproc: Fix up conditional handling.	Marcelina Kościelnicka	2021-03-30	1	-3/+17
* \| \|	gha: trim macOS dependencies	Zachary Snow	2021-03-28	1	-3/+1
* \| \|	gha: combine jobs using matrix	Zachary Snow	2021-03-28	1	-43/+24
* \| \|	rtlil: add const accessors for modules, wires, and cells	Zachary Snow	2021-03-25	2	-0/+15
* \| \|	Merge pull request #2702 from modwizcode/patch-1	whitequark	2021-03-24	1	-0/+2
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\| * \| \|	Clarify bugpoint documentation regarding output	Iris Johnson	2021-03-24	1	-0/+2
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* \| \|	ast: make design available to process_module()	Zachary Snow	2021-03-24	1	-8/+8
* \| \|	rtlil: Fix process memwr roundtrip.	Marcelina Kościelnicka	2021-03-23	1	-1/+1
* \| \|	Merge pull request #2696 from nakengelhardt/guidelines	N. Engelhardt	2021-03-23	11	-318/+295
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\| * \| \|	split CodingReadme into multiple files	N. Engelhardt	2021-03-22	11	-318/+295
* \| \| \|	quicklogic: Add .gitignore file for test outputs.	Marcelina Kościelnicka	2021-03-23	1	-0/+4
* \| \| \|	json: Improve the "processes in module" message a bit.	Marcelina Kościelnicka	2021-03-23	1	-1/+1
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* \| \|	verilog: check entire user type stack for type definition	Xiretza	2021-03-21	2	-6/+22
* \| \|	sv: allow typenames as function return types	Zachary Snow	2021-03-19	3	-0/+46
* \| \|	Merge pull request #2681 from msinger/fix-issue2606	Miodrag Milanović	2021-03-19	1	-3/+23
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\| * \| \|	Fix check for bad std::regex (fixes #2606)	Michael Singer	2021-03-17	1	-3/+23
* \| \| \|	verilog: rebuild user_type_stack from globals before parsing file	Xiretza	2021-03-18	1	-5/+21
* \| \| \|	Add simple CI using github actions.	Marcelina Kościelnicka	2021-03-18	1	-0/+87
* \| \| \|	modtools: fix use-after-free of cell pointers in ModWalker	Xiretza	2021-03-18	1	-0/+2
* \| \| \|	quicklogic: PolarPro 3 support	Lofty	2021-03-18	20	-0/+1033
* \| \| \|	ast: Use better parameter serialization for paramod names.	Marcelina Kościelnicka	2021-03-18	2	-5/+28
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* \| \|	Blackbox all whiteboxes after synthesis	gatecat	2021-03-17	16	-9/+24
* \| \|	bugpoint: add runner option	Zachary Snow	2021-03-17	2	-6/+20
* \| \|	sv: carry over global typedefs from previous files	Zachary Snow	2021-03-17	3	-2/+65
* \| \|	verilog: fix buf/not primitives with multiple outputs	Xiretza	2021-03-17	2	-4/+30
* \| \|	blackbox: Include whiteboxed modules	gatecat	2021-03-17	4	-4/+19