| Commit message (Expand) | Author | Age | Files | Lines | ||
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| | * | | | | tests: fsm to use a randomly-generated seed | Eddie Hung | 2020-04-24 | 1 | -3/+5 | |
| | * | | | | opt_expr: const_xnor replacement to pad Y with 1'b1 | Eddie Hung | 2020-04-24 | 2 | -1/+48 | |
| | * | | | | tests: opt_expr update xnor/xor tests | Eddie Hung | 2020-04-24 | 2 | -7/+6 | |
| | * | | | | opt_expr: more fixes for $xor/$xnor | Eddie Hung | 2020-04-24 | 1 | -23/+47 | |
| | * | | | | opt_expr: do not group by X, more fixes | Eddie Hung | 2020-04-23 | 3 | -20/+61 | |
| | * | | | | tests: add opt_expr tests | Eddie Hung | 2020-04-23 | 5 | -0/+365 | |
| | * | | | | opt_expr: improve single-bit $and/$or/$xor/$xnor cells; gate cells too | Eddie Hung | 2020-04-23 | 1 | -10/+29 | |
| * | | | | | Merge pull request #2045 from YosysHQ/eddie/fix2042 | Eddie Hung | 2020-05-14 | 6 | -1/+107 | |
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| | * | | | | | test: add another testcase as per @nakengelhardt | Eddie Hung | 2020-05-14 | 1 | -0/+25 | |
| | * | | | | | verilog: default to input in sv mode if task/func has no dir ... | Eddie Hung | 2020-05-13 | 1 | -2/+10 | |
| | * | | | | | tests: update/extend task argument tests | Eddie Hung | 2020-05-13 | 2 | -2/+35 | |
| | * | | | | | verilog: error out when non-ANSI task/func arguments | Eddie Hung | 2020-05-11 | 1 | -1/+5 | |
| | * | | | | | tests: add #2042 testcase | Eddie Hung | 2020-05-11 | 1 | -0/+12 | |
| | * | | | | | Setup tests/verilog properly | Eddie Hung | 2020-05-11 | 3 | -0/+24 | |
| * | | | | | | Merge pull request #2052 from YosysHQ/claire/verific_memfix | Claire Wolf | 2020-05-14 | 1 | -2/+12 | |
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| | * | | | | | | Add support for non-power-of-two mem chunks in verific importer | Claire Wolf | 2020-05-14 | 1 | -2/+12 | |
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| * | | | | | | Merge pull request #2050 from YosysHQ/eddie/opt_clean_fixes | Claire Wolf | 2020-05-14 | 2 | -12/+32 | |
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| | * | | | | | | opt_clean: improve warning message | Eddie Hung | 2020-05-14 | 2 | -2/+2 | |
| | * | | | | | | opt_clean: add init test | Eddie Hung | 2020-05-14 | 1 | -0/+13 | |
| | * | | | | | | opt_clean: rminit without -purge; also remove if consistent with const.. | Eddie Hung | 2020-05-14 | 1 | -9/+17 | |
| | * | | | | | | opt_clean: really make 'clean' identical to 'opt_clean' by rminit too | Eddie Hung | 2020-05-14 | 1 | -3/+2 | |
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| * | | | | | | Merge pull request #2027 from YosysHQ/eddie/verilog_neg_upto | Claire Wolf | 2020-05-14 | 4 | -8/+35 | |
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| | * | | | | | techlibs/common: more robustness when *_WIDTH = 0 | Eddie Hung | 2020-05-05 | 3 | -8/+30 | |
| | * | | | | | ast: swap range regardless of range_left >= 0 | Eddie Hung | 2020-05-04 | 1 | -1/+1 | |
| | * | | | | | test: add failing test | Eddie Hung | 2020-05-04 | 1 | -0/+5 | |
| * | | | | | | ice40: fix ICESTORM_LC process sensitivity | Eddie Hung | 2020-05-12 | 1 | -1/+1 | |
| * | | | | | | ice40: fix whitespace | Eddie Hung | 2020-05-12 | 1 | -15/+14 | |
| * | | | | | | ecp5: Add missing SERDES parameters | David Shah | 2020-05-12 | 1 | -0/+4 | |
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| * | | | | | Merge pull request #2038 from nakengelhardt/no-libdir-flag | Claire Wolf | 2020-05-08 | 1 | -2/+1 | |
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| | * | | | | | Remove yosys libdir from LDFLAGS (and fix a typo) | N. Engelhardt | 2020-05-07 | 1 | -2/+1 | |
| * | | | | | | Fix clang compiler warning | Claire Wolf | 2020-05-08 | 1 | -2/+2 | |
| * | | | | | | Merge pull request #2022 from Xiretza/fallthroughs | whitequark | 2020-05-08 | 5 | -9/+26 | |
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| | * | | | | | | Reorder cases to avoid fall-through warning | Xiretza | 2020-05-07 | 1 | -3/+3 | |
| | * | | | | | | Add YS_FALLTHROUGH macro to mark case fall-through | Xiretza | 2020-05-07 | 5 | -6/+23 | |
| * | | | | | | | intel_alm: direct LUTRAM cell instantiation | Dan Ravensloft | 2020-05-07 | 9 | -52/+163 | |
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| * | | | | | | Merge pull request #2005 from YosysHQ/claire/fix1990 | Claire Wolf | 2020-05-07 | 9 | -19/+142 | |
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| | * | | | | | | Fix the other "opt_expr -fine" bug introduced in 213a89558 | Claire Wolf | 2020-05-02 | 1 | -7/+19 | |
| | * | | | | | | Add plusargs for output files in test_autotb output | Claire Wolf | 2020-05-02 | 1 | -3/+10 | |
| | * | | | | | | Bugfix in partsel.v signed indices test cases | Claire Wolf | 2020-05-02 | 1 | -2/+2 | |
| | * | | | | | | Fix handling of signed indices in bit slices | Claire Wolf | 2020-05-02 | 1 | -3/+8 | |
| | * | | | | | | Add tests based on the test case from #1990 | Claire Wolf | 2020-05-02 | 1 | -0/+46 | |
| | * | | | | | | Add AST_SELFSZ and improve handling of bit slices | Claire Wolf | 2020-05-02 | 5 | -7/+22 | |
| | * | | | | | | Add "nowrshmsk" attribute, fix shift-and-mask bit slice write for signed offs... | Claire Wolf | 2020-05-02 | 6 | -7/+57 | |
| * | | | | | | | Merge pull request #2034 from YosysHQ/eddie/abc_remote | Eddie Hung | 2020-05-07 | 1 | -1/+1 | |
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| | * | | | | | | Makefile: git fetch all commits from $(ABCURL) repo | Eddie Hung | 2020-05-06 | 1 | -1/+1 | |
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| * | | | | | | Merge pull request #2028 from zachjs/master | Eddie Hung | 2020-05-06 | 3 | -1/+23 | |
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| | * | | | | | verilog: allow null gen-if then block | Zachary Snow | 2020-05-06 | 3 | -1/+23 | |
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| * | | | | | Merge pull request #2025 from YosysHQ/eddie/frontend_cleanup | Eddie Hung | 2020-05-05 | 7 | -31/+34 | |
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| | * | | | | | frontend: cleanup to use more ID::*, more dict<> instead of map<> | Eddie Hung | 2020-05-04 | 7 | -31/+34 | |
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| * | | | | | Merge pull request #2012 from whitequark/fix-wasi-abc-build | whitequark | 2020-05-05 | 1 | -3/+3 | |
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