diff options
Diffstat (limited to 'tests')
| -rw-r--r-- | tests/arch/xilinx/abc9_dff.ys | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/tests/arch/xilinx/abc9_dff.ys b/tests/arch/xilinx/abc9_dff.ys index c549e1fdc..e3889be05 100644 --- a/tests/arch/xilinx/abc9_dff.ys +++ b/tests/arch/xilinx/abc9_dff.ys @@ -116,4 +116,19 @@ design -load postopt select -assert-count 1 t:FDRE %co %a w:r %i +design -reset +read_verilog <<EOT +module top(input clk, input a, b, output o); +reg r1, r2; +always @(posedge clk) begin + r1 <= a | b; + r2 <= ~(~a & ~b); +end +assign o = r1 | r2; +endmodule +EOT +proc +equiv_opt -assert -multiclock -map +/xilinx/cells_sim.v synth_xilinx -abc9 -dff -noiopad -noclkbuf + + logger -expect-no-warnings |