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authorEddie Hung <eddie@fpgeh.com>2019-06-27 12:53:23 -0700
committerEddie Hung <eddie@fpgeh.com>2019-06-27 12:53:23 -0700
commit9a371cfba925d247c63d5c33d50d272adf8356cc (patch)
tree007f2b99d6bf78cf9b1cc2c18f564b451a22f93e /tests
parent440f173aef421f30c6ce63822532dbb8a1b231af (diff)
parentc4c39e98146b6837c35c425ef7987b2be45c0451 (diff)
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Merge remote-tracking branch 'origin/master' into xaig
Diffstat (limited to 'tests')
-rwxr-xr-xtests/arch/run-test.sh18
1 files changed, 18 insertions, 0 deletions
diff --git a/tests/arch/run-test.sh b/tests/arch/run-test.sh
new file mode 100755
index 000000000..5292d1615
--- /dev/null
+++ b/tests/arch/run-test.sh
@@ -0,0 +1,18 @@
+#!/bin/bash
+
+set -e
+
+echo "Running syntax check on arch sim models"
+for arch in ../../techlibs/*; do
+ find $arch -name cells_sim.v | while read path; do
+ echo -n "Test $path ->"
+ iverilog -t null -I$arch $path
+ echo " ok"
+ done
+done
+
+for path in "../../techlibs/common/simcells.v" "../../techlibs/common/simlib.v"; do
+ echo -n "Test $path ->"
+ iverilog -t null $path
+ echo " ok"
+done