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| author | Claire Xenia Wolf <claire@clairexen.net> | 2021-12-10 00:22:37 +0100 |
|---|---|---|
| committer | Claire Xenia Wolf <claire@clairexen.net> | 2021-12-10 00:22:37 +0100 |
| commit | d6e4d3f1ba9191f0f3bbed2d47a9ef80b8614e77 (patch) | |
| tree | ce3d60c7aa65c8f67a583f1d8da1913ade20fd9e /tests/bram | |
| parent | ce08046f4439575f551449e00b502717459bee63 (diff) | |
| download | yosys-d6e4d3f1ba9191f0f3bbed2d47a9ef80b8614e77.tar.gz yosys-d6e4d3f1ba9191f0f3bbed2d47a9ef80b8614e77.tar.bz2 yosys-d6e4d3f1ba9191f0f3bbed2d47a9ef80b8614e77.zip | |
Fix the tests we just broke
Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
Diffstat (limited to 'tests/bram')
| -rw-r--r-- | tests/bram/run-single.sh | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/tests/bram/run-single.sh b/tests/bram/run-single.sh index 98a45b613..429a79e3c 100644 --- a/tests/bram/run-single.sh +++ b/tests/bram/run-single.sh @@ -1,6 +1,6 @@ #!/bin/bash set -e -../../yosys -qq -p "proc; opt; memory -nomap -bram temp/brams_${2}.txt; opt -fast -full" \ +../../yosys -qq -f verilog -p "proc; opt; memory -nomap -bram temp/brams_${2}.txt; opt -fast -full" \ -l temp/synth_${1}_${2}.log -o temp/synth_${1}_${2}.v temp/brams_${1}.v iverilog -Dvcd_file=\"temp/tb_${1}_${2}.vcd\" -DSIMLIB_MEMDELAY=1 -o temp/tb_${1}_${2}.tb temp/brams_${1}_tb.v \ temp/brams_${1}_ref.v temp/synth_${1}_${2}.v temp/brams_${2}.v ../../techlibs/common/simlib.v |