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authorEddie Hung <eddie@fpgeh.com>2019-06-26 20:00:15 -0700
committerEddie Hung <eddie@fpgeh.com>2019-06-26 20:00:15 -0700
commita7a88109f5b750862b8e45c194e8094fd32b8a5f (patch)
tree7f8aa4d6d3edf36f3119ebde8365c64a461060f2 /techlibs/xilinx
parentb7bef15b16abf1674d9c2efc58536db3abaf0e3d (diff)
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Update comment on boxes
Diffstat (limited to 'techlibs/xilinx')
-rw-r--r--techlibs/xilinx/abc_xc7.box5
1 files changed, 3 insertions, 2 deletions
diff --git a/techlibs/xilinx/abc_xc7.box b/techlibs/xilinx/abc_xc7.box
index 96966a71c..6dd71d758 100644
--- a/techlibs/xilinx/abc_xc7.box
+++ b/techlibs/xilinx/abc_xc7.box
@@ -18,8 +18,9 @@ MUXF8 2 1 3 1
# Inputs: CYINIT DI0 DI1 DI2 DI3 S0 S1 S2 S3 CI
# Outputs: O0 O1 O2 O3 CO0 CO1 CO2 CO3
# (NB: carry chain input/output must be last
-# input/output and have been moved there
-# overriding the alphabetical ordering)
+# input/output and the entire bus has been
+# moved there overriding the otherwise
+# alphabetical ordering)
CARRY4 3 1 10 8
482 - - - - 223 - - - 222
598 407 - - - 400 205 - - 334