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authorEddie Hung <eddie@fpgeh.com>2020-01-16 15:25:49 -0800
committerEddie Hung <eddie@fpgeh.com>2020-01-21 15:19:41 -0800
commit7977574995baa2cdba1401233179f9f84fe96a3a (patch)
tree1649fe008d42e3b9be19aec510b6266da8749c32 /techlibs/common
parentf165a748244b022b215631ade2c8a5e0139cec09 (diff)
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New techmap +/shiftx2mux.v which decomposes LSB first; better for ABC
Diffstat (limited to 'techlibs/common')
-rw-r--r--techlibs/common/Makefile.inc1
-rw-r--r--techlibs/common/shiftx2mux.v38
2 files changed, 39 insertions, 0 deletions
diff --git a/techlibs/common/Makefile.inc b/techlibs/common/Makefile.inc
index a42f63128..5d797ec1d 100644
--- a/techlibs/common/Makefile.inc
+++ b/techlibs/common/Makefile.inc
@@ -30,3 +30,4 @@ $(eval $(call add_share_file,share,techlibs/common/cmp2lut.v))
$(eval $(call add_share_file,share,techlibs/common/cells.lib))
$(eval $(call add_share_file,share,techlibs/common/mul2dsp.v))
$(eval $(call add_share_file,share,techlibs/common/dummy.box))
+$(eval $(call add_share_file,share,techlibs/common/shiftx2mux.v))
diff --git a/techlibs/common/shiftx2mux.v b/techlibs/common/shiftx2mux.v
new file mode 100644
index 000000000..5366d6749
--- /dev/null
+++ b/techlibs/common/shiftx2mux.v
@@ -0,0 +1,38 @@
+(* techmap_celltype = /*"$shift*/ "$shiftx" *)
+module _80_shift_shiftx (A, B, Y);
+ parameter A_SIGNED = 0;
+ parameter B_SIGNED = 0;
+ parameter A_WIDTH = 1;
+ parameter B_WIDTH = 1;
+ parameter Y_WIDTH = 1;
+
+ input [A_WIDTH-1:0] A;
+ input [B_WIDTH-1:0] B;
+ output [Y_WIDTH-1:0] Y;
+
+ parameter [B_WIDTH-1:0] _TECHMAP_CONSTMSK_B_ = 0;
+ parameter [B_WIDTH-1:0] _TECHMAP_CONSTVAL_B_ = 0;
+
+ generate
+ genvar i;
+ localparam CLOG2_Y_WIDTH = $clog2(Y_WIDTH);
+
+ if (B_WIDTH <= CLOG2_Y_WIDTH+1)
+ wire _TECHMAP_FAIL_ = 1;
+ // In order to perform this optimisation, this $shiftx must
+ // only shift in units of Y_WIDTH, which we check by ensuring
+ // that the appropriate LSBs of B are zero
+ else if (_TECHMAP_CONSTMSK_B_[CLOG2_Y_WIDTH-1:0] == {CLOG2_Y_WIDTH{1'b1}} && _TECHMAP_CONSTVAL_B_[CLOG2_Y_WIDTH-1:0] != {CLOG2_Y_WIDTH{1'b0}})
+ wire _TECHMAP_FAIL_ = 1;
+ else begin
+ // Halve the size of $shiftx by $mux-ing A according to
+ // the LSB of B, after discarding the zeroed bits
+ wire [(A_WIDTH+Y_WIDTH)/2-1:0] AA;
+ for (i = 0; i < (A_WIDTH/Y_WIDTH); i=i+2)
+ assign AA[(i/2)*Y_WIDTH +: Y_WIDTH] = B[CLOG2_Y_WIDTH] ? A[(i+1)*Y_WIDTH +: Y_WIDTH] : A[(i+0)*Y_WIDTH +: Y_WIDTH];
+ $shiftx #(.A_SIGNED(A_SIGNED), .B_SIGNED(B_SIGNED), .A_WIDTH((A_WIDTH+Y_WIDTH)/2'd2), .B_WIDTH(B_WIDTH-1), .Y_WIDTH(Y_WIDTH)) _TECHMAP_REPLACE_ (.A(AA), .B({B[B_WIDTH-1:CLOG2_Y_WIDTH+1], {CLOG2_Y_WIDTH{1'b0}}}), .Y(Y));
+ end
+ endgenerate
+endmodule
+
+