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| author | Marcelina Kościelnicka <mwk@0x04.net> | 2020-05-18 18:15:03 +0200 |
|---|---|---|
| committer | Marcelina Kościelnicka <mwk@0x04.net> | 2020-05-19 01:42:40 +0200 |
| commit | aee439360bba642dcbffe5b803aa9a994b11d183 (patch) | |
| tree | a5c15b4a6172ea3ff651f88174fff7d5269ad1c2 /techlibs/common/dff2ff.v | |
| parent | 2d573a0ff680eb9f38358943fbf134f765ba1451 (diff) | |
| download | yosys-aee439360bba642dcbffe5b803aa9a994b11d183.tar.gz yosys-aee439360bba642dcbffe5b803aa9a994b11d183.tar.bz2 yosys-aee439360bba642dcbffe5b803aa9a994b11d183.zip | |
Add force_downto and force_upto wire attributes.
Fixes #2058.
Diffstat (limited to 'techlibs/common/dff2ff.v')
| -rw-r--r-- | techlibs/common/dff2ff.v | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/techlibs/common/dff2ff.v b/techlibs/common/dff2ff.v index 2dc4d20d3..33a79ffff 100644 --- a/techlibs/common/dff2ff.v +++ b/techlibs/common/dff2ff.v @@ -4,7 +4,9 @@ module dff2ff (CLK, D, Q); parameter CLK_POLARITY = 1; input CLK; + (* force_downto *) input [WIDTH-1:0] D; + (* force_downto *) output reg [WIDTH-1:0] Q; wire [1023:0] _TECHMAP_DO_ = "proc;;"; |