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| author | Marcelina Kościelnicka <mwk@0x04.net> | 2021-05-22 19:14:13 +0200 |
|---|---|---|
| committer | Marcelina Kościelnicka <mwk@0x04.net> | 2021-05-22 21:43:00 +0200 |
| commit | c4cc888b2c51a6507b73fdcde1dc61c37384105d (patch) | |
| tree | d5bc86b7ae97217a242c7e1f5b6f9ad6da1e4c7d /passes/sat | |
| parent | c7076495f197732725456992c9a02aed9966139a (diff) | |
| download | yosys-c4cc888b2c51a6507b73fdcde1dc61c37384105d.tar.gz yosys-c4cc888b2c51a6507b73fdcde1dc61c37384105d.tar.bz2 yosys-c4cc888b2c51a6507b73fdcde1dc61c37384105d.zip | |
kernel/rtlil: Extract some helpers for checking memory cell types.
There will soon be more (versioned) memory cells, so handle passes that
only care if a cell is memory-related by a simple helper call instead of
a hardcoded list.
Diffstat (limited to 'passes/sat')
| -rw-r--r-- | passes/sat/sim.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/sat/sim.cc b/passes/sat/sim.cc index 922be886c..2e7a92cec 100644 --- a/passes/sat/sim.cc +++ b/passes/sat/sim.cc @@ -164,7 +164,7 @@ struct SimInstance ff_database[cell] = ff; } - if (cell->type.in(ID($mem), ID($meminit), ID($memwr), ID($memrd))) + if (cell->is_mem_cell()) { mem_cells[cell] = cell->parameters.at(ID::MEMID).decode_string(); } |