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| author | Marcelina Kościelnicka <mwk@0x04.net> | 2020-06-30 21:07:17 +0200 |
|---|---|---|
| committer | Marcelina Kościelnicka <mwk@0x04.net> | 2020-06-30 21:07:17 +0200 |
| commit | 7c91f13f51c6c93dbece0eed91977241b7c346df (patch) | |
| tree | 4036cb3e3fe088ff243703e51af8b4ec0a10a4a0 /passes/sat | |
| parent | 817ae04ee0c445efaf83e9847d4956f2dae0d857 (diff) | |
| download | yosys-7c91f13f51c6c93dbece0eed91977241b7c346df.tar.gz yosys-7c91f13f51c6c93dbece0eed91977241b7c346df.tar.bz2 yosys-7c91f13f51c6c93dbece0eed91977241b7c346df.zip | |
fmcombine: use the master ff cell type list
Diffstat (limited to 'passes/sat')
| -rw-r--r-- | passes/sat/fmcombine.cc | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/passes/sat/fmcombine.cc b/passes/sat/fmcombine.cc index 5694a7473..cb49edac3 100644 --- a/passes/sat/fmcombine.cc +++ b/passes/sat/fmcombine.cc @@ -114,8 +114,7 @@ struct FmcombineWorker Cell *gold = import_prim_cell(cell, "_gold"); Cell *gate = import_prim_cell(cell, "_gate"); if (opts.initeq) { - if (cell->type.in(ID($ff), ID($dff), ID($dffe), - ID($dffsr), ID($adff), ID($dlatch), ID($dlatchsr))) { + if (RTLIL::builtin_ff_cell_types().count(cell->type)) { SigSpec gold_q = gold->getPort(ID::Q); SigSpec gate_q = gate->getPort(ID::Q); SigSpec en = module->Initstate(NEW_ID); |