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author | Eddie Hung <eddie@fpgeh.com> | 2019-08-15 14:50:10 -0700 |
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committer | Eddie Hung <eddie@fpgeh.com> | 2019-08-15 14:50:10 -0700 |
commit | 52355f5185fe42e28775e897f458b38a439c0ec5 (patch) | |
tree | 83d8984e70806c9bcc8cd6d72ea81456ca76aba6 /kernel/yosys.h | |
parent | 6cd8cace0c1d2a9f7b1f1cd56a223c38a5ea799a (diff) | |
download | yosys-52355f5185fe42e28775e897f458b38a439c0ec5.tar.gz yosys-52355f5185fe42e28775e897f458b38a439c0ec5.tar.bz2 yosys-52355f5185fe42e28775e897f458b38a439c0ec5.zip |
Use more ID::{A,B,Y,blackbox,whitebox}
Diffstat (limited to 'kernel/yosys.h')
-rw-r--r-- | kernel/yosys.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/kernel/yosys.h b/kernel/yosys.h index 49716ed52..52e7b3383 100644 --- a/kernel/yosys.h +++ b/kernel/yosys.h @@ -210,6 +210,7 @@ namespace RTLIL { struct Module; struct Design; struct Monitor; + namespace ID {} } namespace AST { @@ -224,6 +225,7 @@ using RTLIL::Wire; using RTLIL::Cell; using RTLIL::Module; using RTLIL::Design; +namespace ID = RTLIL::ID; namespace hashlib { template<> struct hash_ops<RTLIL::Wire*> : hash_obj_ops {}; |