diff options
author | Eddie Hung <eddie@fpgeh.com> | 2019-08-06 16:22:47 -0700 |
---|---|---|
committer | Eddie Hung <eddie@fpgeh.com> | 2019-08-06 16:22:47 -0700 |
commit | 046e1a52147dd4a0e1f23e4aa7cb71b0a4d1b497 (patch) | |
tree | 900ad3764a73cb81396bcf0c0be1bc92c4df135d /backends | |
parent | 3486235338faa1377bb4e1a8981a45b4ee6edfa9 (diff) | |
download | yosys-046e1a52147dd4a0e1f23e4aa7cb71b0a4d1b497.tar.gz yosys-046e1a52147dd4a0e1f23e4aa7cb71b0a4d1b497.tar.bz2 yosys-046e1a52147dd4a0e1f23e4aa7cb71b0a4d1b497.zip |
Use State::S{0,1}
Diffstat (limited to 'backends')
-rw-r--r-- | backends/btor/btor.cc | 4 | ||||
-rw-r--r-- | backends/firrtl/firrtl.cc | 4 | ||||
-rw-r--r-- | backends/verilog/verilog_backend.cc | 4 |
3 files changed, 6 insertions, 6 deletions
diff --git a/backends/btor/btor.cc b/backends/btor/btor.cc index 7bacce2af..7c054d655 100644 --- a/backends/btor/btor.cc +++ b/backends/btor/btor.cc @@ -616,8 +616,8 @@ struct BtorWorker if (initstate_nid < 0) { int sid = get_bv_sid(1); - int one_nid = get_sig_nid(Const(1, 1)); - int zero_nid = get_sig_nid(Const(0, 1)); + int one_nid = get_sig_nid(State::S1); + int zero_nid = get_sig_nid(State::S0); initstate_nid = next_nid++; btorf("%d state %d\n", initstate_nid, sid); btorf("%d init %d %d %d\n", next_nid++, sid, initstate_nid, one_nid); diff --git a/backends/firrtl/firrtl.cc b/backends/firrtl/firrtl.cc index 1c7a7351f..4758c6d4d 100644 --- a/backends/firrtl/firrtl.cc +++ b/backends/firrtl/firrtl.cc @@ -122,9 +122,9 @@ struct FirrtlWorker // Current (3/13/2019) conventions: // generate a constant 0 for clock and a constant 1 for enable if they are undefined. if (!clk.is_fully_def()) - this->clk = SigSpec(RTLIL::Const(0, 1)); + this->clk = SigSpec(State::S0); if (!ena.is_fully_def()) - this->ena = SigSpec(RTLIL::Const(1, 1)); + this->ena = SigSpec(State::S1); } string gen_read(const char * indent) { string addr_expr = make_expr(addr); diff --git a/backends/verilog/verilog_backend.cc b/backends/verilog/verilog_backend.cc index 9a797b535..6cb053f1d 100644 --- a/backends/verilog/verilog_backend.cc +++ b/backends/verilog/verilog_backend.cc @@ -380,9 +380,9 @@ void dump_attributes(std::ostream &f, std::string indent, dict<RTLIL::IdString, for (auto it = attributes.begin(); it != attributes.end(); ++it) { f << stringf("%s" "%s %s", indent.c_str(), as_comment ? "/*" : "(*", id(it->first).c_str()); f << stringf(" = "); - if (modattr && (it->second == Const(0, 1) || it->second == Const(0))) + if (modattr && (it->second == State::S0 || it->second == Const(0))) f << stringf(" 0 "); - else if (modattr && (it->second == Const(1, 1) || it->second == Const(1))) + else if (modattr && (it->second == State::S1 || it->second == Const(1))) f << stringf(" 1 "); else dump_const(f, it->second, -1, 0, false, as_comment); |