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* Add missing <set> includesgatecat2023-01-201-0/+1
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* refactor: Use IdString::in instead of || chainsgatecat2022-08-101-4/+3
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* refactor: id(stringf(...)) to new idf(...) helpergatecat2022-08-101-2/+2
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Change write_dcc to work with tilegroups from prjoxideMaciej Dudek2022-05-271-3/+2
| | | | Signed-off-by: Maciej Dudek <mdudek@antmicro.com>
* clangformatgatecat2022-03-311-8/+9
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Rename parse_lattice_param to parse_lattice_param_from_cellMaciej Dudek2022-03-301-17/+22
| | | | | | | | | Add new definition for parse_lattice_param Now parse_lattice_param is design to parse Property rather than search for it in cell. This functionalty was move to parse_lattice_param_from_cell. Signed-off-by: Maciej Dudek <mdudek@antmicro.com>
* Nexus: Fixed OSCA parameters, add pll default parametersMaciej Dudek2022-03-181-2/+142
| | | | Signed-off-by: Maciej Dudek <mdudek@antmicro.com>
* nexus: Added support for the DCS BelMaciej Kurc2022-03-161-0/+11
| | | | Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
* nexus: Added FASM feature emission for DCC and port timing class infoMaciej Kurc2022-03-151-0/+12
| | | | Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
* refactor: New member functions to replace design_utilsgatecat2022-02-181-4/+4
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* nexus: handle SLEWRATE in pdcKarol Gugala2021-12-201-2/+2
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* nexus: LUT permutation supportgatecat2021-09-241-2/+39
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* nexus: Support for split Vcc routinggatecat2021-09-221-0/+2
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Use correct names for IDDRX1_ODDRX1 FASM featuresMaciej Kurc2021-09-171-5/+1
| | | | Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
* Added automatic inference and integration of FFs driving T pin into IOLOGICMaciej Kurc2021-09-171-0/+6
| | | | Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
* nexus: Basic packer and FASM support for I/ODDRgatecat2021-07-281-2/+16
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* nexus: Disable center DCC-thrus on 17k devicegatecat2021-06-161-1/+0
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* nexus: Fix FASM gen for DCC-thrugatecat2021-06-161-3/+34
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Fixing old emails and names in copyrightsgatecat2021-06-121-1/+1
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* nexus: Fix LRAM x coordgatecat2021-06-101-0/+2
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* Using hashlib in archesgatecat2021-06-021-5/+5
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Use hashlib for core netlist structuresgatecat2021-06-021-10/+10
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* nexus: Fix some IO FASM gengatecat2021-03-301-0/+4
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* nexus: Fix LIFCL-17 LRAM FASMgatecat2021-03-301-0/+2
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* nexus: Fix default IO configgatecat2021-03-291-0/+2
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Merge pull request #651 from YosysHQ/gatecat/nexus-vccogatecat2021-03-291-3/+51
|\ | | | | nexus: Fix bank Vcco FASM
| * nexus: Fix bank Vcco FASMgatecat2021-03-291-3/+51
| | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
* | nexus: Default HF_OSC_EN to ENABLEDgatecat2021-03-291-1/+1
|/ | | | Signed-off-by: gatecat <gatecat@ds0.me>
* nexus: Fix FASM gen for LIFCL-17gatecat2021-03-261-1/+4
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Split nextpnr.h to allow for linear inclusion.Keith Rothman2021-03-151-0/+1
| | | | | | | | | | | | | | | | | | | "nextpnr.h" is no longer the god header. Important improvements: - Functions in log.h can be used without including BaseCtx/Arch/Context. This means that log_X functions can be called without included "nextpnr.h" - NPNR_ASSERT can be used without including "nextpnr.h" by including "nextpnr_assertions.h". This allows NPNR_ASSERT to be used safely in any header file. - Types defined in "archdefs.h" are now available without including BaseCtx/Arch/Context. This means that utility classes that will be used inside of BaseCtx/Arch/Context can be defined safely in a self-contained header. Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* nexus: Support for hard DPHYgatecat2021-03-081-0/+32
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Mark IdString and IdStringList single argument constructors explicit.Keith Rothman2021-02-041-6/+6
| | | | | | | | | Single argument constructors will silently convert to that type. This is typically not the right thing to do. For example, the nexus and ice40 arch_pybindings.h files were incorrectly parsing bel name strings, etc. Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Make RelSlice uncopyableD. Shah2021-01-271-1/+1
| | | | Signed-off-by: D. Shah <dave@ds0.me>
* nexus: Switch from RelPtr to RelSliceD. Shah2021-01-271-4/+4
| | | | | | | | | | This replaces RelPtrs and a separate length field with a Rust-style slice containing both a pointer and a length; with bounds checking always enforced. Thus iterating over these structures is both cleaner and safer. Signed-off-by: D. Shah <dave@ds0.me>
* nexus: Add support for initialised LRAMDavid Shah2020-12-071-1/+23
| | | | Signed-off-by: David Shah <dave@ds0.me>
* nexus: Add basic LRAM support (no init)David Shah2020-12-021-0/+18
| | | | Signed-off-by: David Shah <dave@ds0.me>
* nexus: Add PLL supportDavid Shah2020-12-021-0/+56
| | | | Signed-off-by: David Shah <dave@ds0.me>
* nexus: Larger DSP tweaksDavid Shah2020-11-301-1/+7
| | | | Signed-off-by: David Shah <dave@ds0.me>
* nexus: Support for unclocked 9x9 multipliesDavid Shah2020-11-301-0/+25
| | | | Signed-off-by: David Shah <dave@ds0.me>
* nexus: Basic support for carriesDavid Shah2020-11-301-3/+3
| | | | Signed-off-by: David Shah <dave@ds0.me>
* nexus: Basic support for differential IO typesDavid Shah2020-11-301-3/+86
| | | | Signed-off-by: David Shah <dave@ds0.me>
* nexus: EBR fixesDavid Shah2020-11-301-4/+5
| | | | Signed-off-by: David Shah <dave@ds0.me>
* nexus: EBR FASM generationDavid Shah2020-11-301-0/+78
| | | | Signed-off-by: David Shah <dave@ds0.me>
* nexus: LUTRAM supportDavid Shah2020-11-301-0/+13
| | | | Signed-off-by: David Shah <dave@ds0.me>
* nexus: Generate FASM files that can be used standaloneDavid Shah2020-11-301-6/+96
| | | | Signed-off-by: David Shah <dave@ds0.me>
* nexus: Add constant/inversion packingDavid Shah2020-11-301-5/+42
| | | | Signed-off-by: David Shah <dave@ds0.me>
* nexus: More pin styles and FASM pinmux genDavid Shah2020-11-301-0/+24
| | | | Signed-off-by: David Shah <dave@ds0.me>
* nexus: Refactor cell pin style dbDavid Shah2020-11-301-4/+0
| | | | Signed-off-by: David Shah <dave@ds0.me>
* nexus: Tidy up FASM backendDavid Shah2020-11-301-9/+32
| | | | Signed-off-by: David Shah <dave@ds0.me>
* nexus: Use tilegroups for IO bitgenDavid Shah2020-11-301-2/+13
| | | | Signed-off-by: David Shah <dave@ds0.me>
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