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authorD. Shah <dave@ds0.me>2021-01-27 16:46:18 +0000
committerD. Shah <dave@ds0.me>2021-01-27 17:24:01 +0000
commite049d5f2fc126a7157d0c33a36f094332da7bace (patch)
tree26c18889e2ba58a2ad4e944d0891871dc05c56d9 /nexus/fasm.cc
parentdc46d84c35d695748fa46fa6f27cd02ed0b05e03 (diff)
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nexus: Switch from RelPtr to RelSlice
This replaces RelPtrs and a separate length field with a Rust-style slice containing both a pointer and a length; with bounds checking always enforced. Thus iterating over these structures is both cleaner and safer. Signed-off-by: D. Shah <dave@ds0.me>
Diffstat (limited to 'nexus/fasm.cc')
-rw-r--r--nexus/fasm.cc8
1 files changed, 4 insertions, 4 deletions
diff --git a/nexus/fasm.cc b/nexus/fasm.cc
index b041bf43..f320405d 100644
--- a/nexus/fasm.cc
+++ b/nexus/fasm.cc
@@ -150,9 +150,9 @@ struct NexusFasmWriter
const PhysicalTileInfoPOD &tile_by_type_and_loc(int loc, IdString type)
{
auto &ploc = ctx->chip_info->grid[loc];
- for (int i = 0; i < ploc.num_phys_tiles; i++) {
- if (ploc.phys_tiles[i].tiletype == type.index)
- return ploc.phys_tiles[i];
+ for (auto &pt : ploc.phys_tiles) {
+ if (pt.tiletype == type.index)
+ return pt;
}
log_error("No tile of type %s found at location R%dC%d", ctx->nameOf(type), loc / ctx->chip_info->width,
loc % ctx->chip_info->width);
@@ -161,7 +161,7 @@ struct NexusFasmWriter
const PhysicalTileInfoPOD &tile_at_loc(int loc)
{
auto &ploc = ctx->chip_info->grid[loc];
- NPNR_ASSERT(ploc.num_phys_tiles == 1);
+ NPNR_ASSERT(ploc.phys_tiles.size() == 1);
return ploc.phys_tiles[0];
}
// Escape an internal prjoxide name for FASM by replacing : with __