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* Add Arch::getBelPins() to generic and iCE40 archsClifford Wolf2018-07-222-0/+17
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add Arch::getBelPinType() and Arch::getWireBelPins() in iCE40 archClifford Wolf2018-07-223-4/+57
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Rename getWireBelPin to getBelPinWireClifford Wolf2018-07-226-18/+18
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* clangformatClifford Wolf2018-07-223-8/+4
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Merge branch 'q3k/lock-2-electric-boogaloo' into 'master'Clifford Wolf2018-07-212-4/+12
|\ | | | | | | | | Basic locking and threading for Arch/GUI See merge request SymbioticEDA/nextpnr!10
| * Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into ↵Sergiusz Bazanski2018-07-219-543/+904
| |\ | | | | | | | | | q3k/lock-2-electric-boogaloo
| * | Re-enable drawing Pips.Sergiusz Bazanski2018-07-201-3/+3
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| * | clang-formatSergiusz Bazanski2018-07-201-1/+1
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| * | Nuke IdStringDBSergiusz Bazanski2018-07-201-1/+1
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| * | Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into ↵Sergiusz Bazanski2018-07-2016-95/+361
| |\ \ | | | | | | | | | | | | q3k/lock-2-electric-boogaloo
| * | | WIP.Serge Bazanski2018-07-171-0/+8
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| * | | Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into ↵Serge Bazanski2018-07-171-4/+4
| |\ \ \ | | | | | | | | | | | | | | | q3k/lock-2-electric-boogaloo
| * \ \ \ Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into ↵Serge Bazanski2018-07-155-14/+261
| |\ \ \ \ | | | | | | | | | | | | | | | | | | q3k/lock-2-electric-boogaloo
| * | | | | Refactor IdString functionality into IdStringDBSerge Bazanski2018-07-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This lets us more precisely control the lifetime of IdString databases in contexts/arches.
* | | | | | Add Loc constructorsClifford Wolf2018-07-211-6/+1
| |_|_|_|/ |/| | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | Added driver and users for netsMiodrag Milanovic2018-07-211-0/+8
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* | | | | Merge branch 'router1ng' into 'master'Clifford Wolf2018-07-211-0/+1
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | Router1ng See merge request SymbioticEDA/nextpnr!13
| * | | | | Refactoring of router1Clifford Wolf2018-07-211-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Use source-sink pairs as jobs, not whole nets - Route nets with smallest slack first - Preserve routes for already routed source-sink pairs - Add small incentive for re-using wires Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | | Map ports to netsMiodrag Milanovic2018-07-211-0/+14
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* | | | | | create io cells out of ascMiodrag Milanovic2018-07-211-0/+27
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* | | | | | add cells that are in default state or no configurationMiodrag Milanovic2018-07-211-0/+40
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* | | | | | Add used cells and attach them to belsMiodrag Milanovic2018-07-211-0/+39
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* | | | | | Assign proper pipsMiodrag Milanovic2018-07-211-9/+27
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* | | | | | add only missing netMiodrag Milanovic2018-07-211-3/+6
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* | | | | Change DelayInfo semantics to what we actually needClifford Wolf2018-07-211-3/+8
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | Add getWireDelay APIClifford Wolf2018-07-211-0/+6
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | Fix warnings and statusMiodrag Milanovic2018-07-212-2/+19
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* | | | | Made save project work as wellMiodrag Milanovic2018-07-211-3/+0
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* | | | | fix introduced bugMiodrag Milanovic2018-07-211-0/+2
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* | | | | Bind wires to netMiodrag Milanovic2018-07-201-629/+637
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* | | | | Add Location APIs to generic archClifford Wolf2018-07-202-8/+20
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | Improve iCE40 and common Loc codeClifford Wolf2018-07-203-15/+33
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | | | | Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnr into gridapiClifford Wolf2018-07-2018-132/+517
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| * | | | | Few more checks on parameters and error eolMiodrag Milanovic2018-07-202-7/+17
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| * | | | | Start adding bitstream reading for ice40Miodrag Milanovic2018-07-203-33/+142
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| * | | | ice40: Optimise reset/enable net checkingDavid Shah2018-07-203-11/+14
| | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | | | ice40: Trim DSP inputs that are constant where appropriateDavid Shah2018-07-191-0/+4
| | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | | | ice40: Packer and bitstream gen support for MAC16sDavid Shah2018-07-193-3/+111
| | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | | | ice40: Adding cell definition for DSPsDavid Shah2018-07-194-5/+79
| | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | | | ice40: Add virtual padin wires for intoscs and GB_IOsDavid Shah2018-07-191-1/+14
| | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | | | Reducing performance cost of assertsDavid Shah2018-07-191-1/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | | | ice40: Adding data for extra cell configurationDavid Shah2018-07-192-4/+39
| | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | | | ice40: RenamingDavid Shah2018-07-184-9/+9
| | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | | | ice40: Fixes for inverted clocksDavid Shah2018-07-183-2/+7
| | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | | | Cleanups in iCE40 blinky and picorv32 testsClifford Wolf2018-07-184-35/+2
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * | | | ice40: Use xArchArgs in validity checkDavid Shah2018-07-184-39/+39
| | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | | | ice40: Make assignArchArgs a Arch method; call also after legaliserDavid Shah2018-07-184-31/+37
| | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | | | ice40: Assign ArchArgs after packingDavid Shah2018-07-187-14/+63
| | | | | | | | | | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | | | Add ArchNetInfo and ArchCellInfoClifford Wolf2018-07-171-1/+3
| | |_|/ | |/| | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* / | | Add Loc struct for x/y/z bel locationsClifford Wolf2018-07-171-2/+29
|/ / / | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
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