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authorClifford Wolf <clifford@clifford.at>2018-07-22 12:08:52 +0200
committerClifford Wolf <clifford@clifford.at>2018-07-22 12:08:52 +0200
commite13fc7edabb449d21ad6473bab23d5c1b2cf3761 (patch)
tree88fd3c6f3b69f9cc84bb0aad28f1649e5ddf6776 /ice40
parentb60c9485d2d324a221c7050aa6437b291b3dedf4 (diff)
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Add Arch::getBelPins() to generic and iCE40 archs
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Diffstat (limited to 'ice40')
-rw-r--r--ice40/arch.cc15
-rw-r--r--ice40/arch.h2
2 files changed, 17 insertions, 0 deletions
diff --git a/ice40/arch.cc b/ice40/arch.cc
index 5f0384a3..65b21afd 100644
--- a/ice40/arch.cc
+++ b/ice40/arch.cc
@@ -340,6 +340,21 @@ WireId Arch::getBelPinWire(BelId bel, PortPin pin) const
return ret;
}
+std::vector<PortPin> Arch::getBelPins(BelId bel) const
+{
+ std::vector<PortPin> ret;
+
+ NPNR_ASSERT(bel != BelId());
+
+ int num_bel_wires = chip_info->bel_data[bel.index].num_bel_wires;
+ const BelWirePOD *bel_wires = chip_info->bel_data[bel.index].bel_wires.get();
+
+ for (int i = 0; i < num_bel_wires; i++)
+ ret.push_back(bel_wires[i].port);
+
+ return ret;
+}
+
// -----------------------------------------------------------------------
WireId Arch::getWireByName(IdString name) const
diff --git a/ice40/arch.h b/ice40/arch.h
index f3016424..2e2018fb 100644
--- a/ice40/arch.h
+++ b/ice40/arch.h
@@ -494,6 +494,8 @@ struct Arch : BaseCtx
return range;
}
+ std::vector<PortPin> getBelPins(BelId bel) const;
+
// -------------------------------------------------
WireId getWireByName(IdString name) const;