| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Fixes for new part types | Miodrag Milanovic | 2020-07-08 | 1 | -8/+20 |
| * | ice40: Add fallback behavior for Extra Cell config bits vectors | Sylvain Munaut | 2020-06-02 | 1 | -1/+11 |
| * | ice40: Add support for the 2nd bit of SHIFTREG_DIV_MODE | Sylvain Munaut | 2020-06-02 | 1 | -1/+1 |
| * | ice40: Improve error handling of Lattice-style parameters | David Shah | 2019-12-10 | 1 | -0/+3 |
| * | Major Property improvements for common and iCE40 | David Shah | 2019-08-05 | 1 | -29/+33 |
| * | clangformat | David Shah | 2019-06-24 | 1 | -2/+3 |
| * | ice40: add RGB_DRV/LED_DRV_CUR support for u4k | Simon Schubert | 2019-06-10 | 1 | -0/+7 |
| * | ice40: Add support for SB_I2C and SB_SPI | Sylvain Munaut | 2019-03-25 | 1 | -0/+22 |
| * | ice40: support u4k | Simon Schubert | 2019-02-23 | 1 | -1/+11 |
| * | ice40: Add PCF support for -pullup, -pullup_resistor and -nowarn | David Shah | 2018-12-20 | 1 | -2/+15 |
| * | ice40: Improve bitstream error handling | David Shah | 2018-12-06 | 1 | -2/+10 |
| * | clangformat | David Shah | 2018-12-06 | 1 | -1/+1 |
| * | ice40: Add support for placing SB_LEDDA_IP block. | Daniel Serpell | 2018-12-01 | 1 | -1/+2 |
| * | ice40: Update the way LVDS inputs are handled during bitstream generation | Sylvain Munaut | 2018-11-28 | 1 | -48/+48 |
| * | ice40: Add support for SB_RGBA_DRV | Sylvain Munaut | 2018-11-19 | 1 | -0/+5 |
| * | ice40: Add support for SB_GB_IO | Sylvain Munaut | 2018-11-19 | 1 | -0/+1 |
| * | ice40: Add support for PLL global outputs via PADIN | Sylvain Munaut | 2018-11-19 | 1 | -44/+50 |
| * | ice40: Introduce the concept of forPadIn SB_GB | Sylvain Munaut | 2018-11-19 | 1 | -1/+17 |
| * | ice40/bitstream: Handle IoCtrl.IE_ polarity when configuring unused SB_IO | Sylvain Munaut | 2018-11-19 | 1 | -2/+7 |
| * | ice40/bitstream: Convert to UNIX line endings | Sylvain Munaut | 2018-11-16 | 1 | -1043/+1043 |
| * | ice40: Remove unnecessary RAM assertion | David Shah | 2018-11-16 | 1 | -1/+0 |
| * | ice40: Don't set colbuf bits for 384 | David Shah | 2018-11-11 | 1 | -0/+2 |
| * | clangformat | David Shah | 2018-09-30 | 1 | -4/+1 |
| * | ice40: LVDS input bitstream support | David Shah | 2018-09-24 | 1 | -4/+48 |
| * | do not break if there are no nets loaded from sym section | Miodrag Milanovic | 2018-08-18 | 1 | -4/+6 |
| * | Get rid of PortPin and BelType (ice40, generic, docs) | Clifford Wolf | 2018-08-08 | 1 | -17/+17 |
| * | API change: Use CellInfo* and NetInfo* as cell/net handles (common, ice40) | Clifford Wolf | 2018-08-05 | 1 | -24/+24 |
| * | clangformat | Clifford Wolf | 2018-08-05 | 1 | -21/+22 |
| * | ice40: Bitstream gen for LUT permutation | David Shah | 2018-08-04 | 1 | -8/+78 |
| * | ice40: Add bitstream gen for routethru LUTs | David Shah | 2018-08-03 | 1 | -9/+58 |
| * | ice40: Add HFOSC support, force fabric routing on oscillators for now | David Shah | 2018-08-01 | 1 | -0/+4 |
| * | clangformat | Sergiusz Bazanski | 2018-08-01 | 1 | -2/+3 |
| * | clangformat | Eddie Hung | 2018-07-25 | 1 | -3/+2 |
| * | ice40: fixes before review | Sergiusz Bazanski | 2018-07-24 | 1 | -6/+6 |
| * | ice40: move PLL->IO from pseudo pip to second uphill bel | Sergiusz Bazanski | 2018-07-24 | 1 | -15/+16 |
| * | ice40: emit list of upbels in chipdb | Sergiusz Bazanski | 2018-07-24 | 1 | -1/+1 |
| * | clang-format | Sergiusz Bazanski | 2018-07-24 | 1 | -14/+21 |
| * | ice40: A slightly nicer way to do this. | Sergiusz Bazanski | 2018-07-24 | 1 | -46/+31 |
| * | ice40: Refactor PLL/LOCK LUT splicing out into Arch:: | Sergiusz Bazanski | 2018-07-24 | 1 | -0/+1 |
| * | ice40: Implement emitting PLLs | Sergiusz Bazanski | 2018-07-24 | 1 | -14/+104 |
| * | clangformat | David Shah | 2018-07-23 | 1 | -2/+3 |
| * | Move to new API and remove deprecated | Miodrag Milanovic | 2018-07-22 | 1 | -36/+38 |
| * | Rename getWireBelPin to getBelPinWire | Clifford Wolf | 2018-07-22 | 1 | -3/+3 |
| * | Added driver and users for nets | Miodrag Milanovic | 2018-07-21 | 1 | -0/+8 |
| * | Map ports to nets | Miodrag Milanovic | 2018-07-21 | 1 | -0/+14 |
| * | create io cells out of asc | Miodrag Milanovic | 2018-07-21 | 1 | -0/+27 |
| * | add cells that are in default state or no configuration | Miodrag Milanovic | 2018-07-21 | 1 | -0/+40 |
| * | Add used cells and attach them to bels | Miodrag Milanovic | 2018-07-21 | 1 | -0/+39 |
| * | Assign proper pips | Miodrag Milanovic | 2018-07-21 | 1 | -9/+27 |
| * | add only missing net | Miodrag Milanovic | 2018-07-21 | 1 | -3/+6 |
