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author | Sylvain Munaut <tnt@246tNt.com> | 2019-03-22 23:29:34 +0100 |
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committer | Sylvain Munaut <tnt@246tNt.com> | 2019-03-25 23:48:59 +0100 |
commit | d401e3e1a09e2e5d78f18f32405c82293ce68545 (patch) | |
tree | fe46510d61a491a9d1b85ffba102e0eb9c69b8c2 /ice40/bitstream.cc | |
parent | c2d87846d8e6c9603f432c1b021f58023f7625b4 (diff) | |
download | nextpnr-d401e3e1a09e2e5d78f18f32405c82293ce68545.tar.gz nextpnr-d401e3e1a09e2e5d78f18f32405c82293ce68545.tar.bz2 nextpnr-d401e3e1a09e2e5d78f18f32405c82293ce68545.zip |
ice40: Add support for SB_I2C and SB_SPI
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Diffstat (limited to 'ice40/bitstream.cc')
-rw-r--r-- | ice40/bitstream.cc | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/ice40/bitstream.cc b/ice40/bitstream.cc index fe0d592d..9b85dff5 100644 --- a/ice40/bitstream.cc +++ b/ice40/bitstream.cc @@ -618,6 +618,28 @@ void write_asc(const Context *ctx, std::ostream &out) } else if (cell.second->type == ctx->id("SB_WARMBOOT") || cell.second->type == ctx->id("ICESTORM_LFOSC") || cell.second->type == ctx->id("SB_LEDDA_IP")) { // No config needed + } else if (cell.second->type == ctx->id("SB_I2C")) { + bool sda_in_dly = !cell.second->attrs.count(ctx->id("SDA_INPUT_DELAYED")) || + std::stoi(cell.second->attrs[ctx->id("SDA_INPUT_DELAYED")]); + bool sda_out_dly = !cell.second->attrs.count(ctx->id("SDA_OUTPUT_DELAYED")) || + std::stoi(cell.second->attrs[ctx->id("SDA_OUTPUT_DELAYED")]); + set_ec_cbit(config, ctx, get_ec_config(ctx->chip_info, cell.second->bel), "SDA_INPUT_DELAYED", sda_in_dly, + "IpConfig."); + set_ec_cbit(config, ctx, get_ec_config(ctx->chip_info, cell.second->bel), "SDA_OUTPUT_DELAYED", sda_out_dly, + "IpConfig."); + set_ec_cbit(config, ctx, get_ec_config(ctx->chip_info, cell.second->bel), "I2C_ENABLE_0", true, + "IpConfig."); + set_ec_cbit(config, ctx, get_ec_config(ctx->chip_info, cell.second->bel), "I2C_ENABLE_1", true, + "IpConfig."); + } else if (cell.second->type == ctx->id("SB_SPI")) { + set_ec_cbit(config, ctx, get_ec_config(ctx->chip_info, cell.second->bel), "SPI_ENABLE_0", true, + "IpConfig."); + set_ec_cbit(config, ctx, get_ec_config(ctx->chip_info, cell.second->bel), "SPI_ENABLE_1", true, + "IpConfig."); + set_ec_cbit(config, ctx, get_ec_config(ctx->chip_info, cell.second->bel), "SPI_ENABLE_2", true, + "IpConfig."); + set_ec_cbit(config, ctx, get_ec_config(ctx->chip_info, cell.second->bel), "SPI_ENABLE_3", true, + "IpConfig."); } else if (cell.second->type == ctx->id("ICESTORM_SPRAM")) { const BelInfoPOD &beli = ci.bel_data[bel.index]; int x = beli.x, y = beli.y, z = beli.z; |