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* Implement the placement validity checkerDavid Shah2018-06-121-1/+3
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* ice40: Start working on a packer, currently not testedDavid Shah2018-06-121-0/+4
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* ice40: Adding cell utilities for packingDavid Shah2018-06-122-15/+27
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* Adding some utilities for packingDavid Shah2018-06-122-0/+100
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* Add "nextpnr.h"Clifford Wolf2018-06-119-55/+78
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Remove pool, dict, vector namespace aliasesClifford Wolf2018-06-113-17/+12
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Renamed LOC attribute to BEL, fix ice40 IO bel namesClifford Wolf2018-06-091-3/+3
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Adding basic placement constraintsDavid Shah2018-06-092-2/+40
| | | | | | | Specify the attribute (* LOC="bel_name" *) on any cell to constrain its placement to that bel. Signed-off-by: David Shah <davey1576@gmail.com>
* Add very basic routerClifford Wolf2018-06-093-3/+201
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Remove writing on sell types to cout (left over debug output?)Clifford Wolf2018-06-091-1/+0
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Improving the Python bindings, particularly the map/pair wrappersDavid Shah2018-06-082-6/+162
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* python: Fixing builds as importable moduleDavid Shah2018-06-081-0/+4
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* Reformat remaining filesDavid Shah2018-06-083-87/+100
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* Applied clang-format to my own contributionsZipCPU2018-06-075-255/+255
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* Adjusted info message names for rule-checker and parserZipCPU2018-06-071-1/+2
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* Fix placer build for dummy archClifford Wolf2018-06-071-3/+3
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Moved placer definitions to place.h, main automatically runs placer nowZipCPU2018-06-072-3/+27
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* Initial (random) placer capabilityZipCPU2018-06-072-5/+92
| | | | | | | | | | This commit also includes changes to jsonparse to allow it to 1) recognize ports with no connection, and set their net pointers to NULL 2) recognize designs with a ports node rather than a ports_direction The rule checker has also been modified to accommodate possible NULL netlists The ice40 chip now also has iterator operations ++bi and bi++.
* Merge branch 'master' into gqtechZipCPU2018-06-076-127/+367
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| * Replacing Boost type_traits with stdDavid Shah2018-06-071-1/+1
| | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * Reformat Python bindings and ice40 mainDavid Shah2018-06-072-173/+177
| | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * Merge branch 'master' of gitlab.com:SymbioticEDA/nextpnrDavid Shah2018-06-073-60/+64
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| | * clang-format for design and chip codebaseClifford Wolf2018-06-072-59/+61
| | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| | * Fix clang-format include order issuesClifford Wolf2018-06-071-1/+3
| | | | | | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
| * | Global design object workingDavid Shah2018-06-072-1/+7
| | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | Working on global Python design objectDavid Shah2018-06-072-14/+49
| | | | | | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * | Developing Python bindings for Design and related typesDavid Shah2018-06-073-49/+179
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| * Adding Python to/from string wrappers for internal IDsDavid Shah2018-06-071-0/+48
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| * Allow loading and running Python files before GUI startsDavid Shah2018-06-072-34/+46
| | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
| * rulecheck.cc: Add missing returnDavid Shah2018-06-061-0/+1
| | | | | | | | Signed-off-by: David Shah <davey1576@gmail.com>
* | Removed unused set of warnings from log.ccZipCPU2018-06-062-5/+2
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* Attempt to add JSON parser--not working yet w/ build systemZipCPU2018-06-061-1/+1
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* Merge branch 'master' into gqtechZipCPU2018-06-062-5/+1
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| * Refactor Chip API and iCE40 databaseClifford Wolf2018-06-062-5/+1
| | | | | | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* | Applied Rule Check to parser results, refactored JSON parserZipCPU2018-06-061-0/+61
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* | Merge branch 'master' into gqtechZipCPU2018-06-064-0/+107
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| * Initial GUI workMiodrag Milanovic2018-06-054-0/+107
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* | Removed erroneous BEL assignment in JSON parserZipCPU2018-06-061-3/+3
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* Removed the log_ dependencies from json-parserZipCPU2018-06-052-12/+8
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* Added some logging functions, borrowed from YosysZipCPU2018-06-052-0/+351
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* Initial JSON parserZipCPU2018-06-051-12/+16
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* Add 'styles' to GraphicElementDavid Shah2018-06-041-0/+14
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* Replace GuiLine with GraphicElementClifford Wolf2018-06-041-0/+13
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Python bindings working on both architecturesDavid Shah2018-06-022-61/+86
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* Simple Python test workingDavid Shah2018-06-021-2/+2
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* Add architecture specific Python defsDavid Shah2018-06-021-1/+5
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* Adding generic Python range and iterator bindingsDavid Shah2018-06-021-3/+83
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* Creating an empty Python moduleDavid Shah2018-06-021-0/+15
| | | | Signed-off-by: David Shah <davey1576@gmail.com>
* Add DelayInfo structClifford Wolf2018-05-291-1/+1
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
* Add MakefileClifford Wolf2018-05-262-1/+22
| | | | Signed-off-by: Clifford Wolf <clifford@clifford.at>
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