| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | cmake: Make HeAP placer always-enabled | gatecat | 2023-03-17 | 1 | -21/+0 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | common: disable parallel refinement only without threads. | Catherine | 2023-02-23 | 4 | -8/+8 |
| | | | | | Previously it was always disabled on WebAssembly builds. | ||||
| * | clangformat | gatecat | 2023-01-02 | 1 | -2/+5 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | initialize netShareWeight | Miodrag Milanovic | 2022-12-22 | 1 | -0/+1 |
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| * | propagate netShareWeight | Miodrag Milanovic | 2022-12-22 | 2 | -1/+6 |
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| * | Merge pull request #1066 from arjenroodselaar/place_timeout | myrtle | 2022-12-21 | 2 | -6/+20 |
| |\ | | | | | Timeout when legal placement can't be found for cell | ||||
| | * | Set divisor instead of absolute value | Arjen Roodselaar | 2022-12-20 | 1 | -4/+9 |
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| | * | Allow setting cell placement timeout | Arjen Roodselaar | 2022-12-20 | 2 | -10/+11 |
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| | * | Add --no-placer-timeout flag to override timeout during refinement | Arjen Roodselaar | 2022-12-19 | 2 | -5/+8 |
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| | * | Increase timeout | Arjen Roodselaar | 2022-12-19 | 1 | -2/+4 |
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| | * | Timeout when legal placement can't be found for cell | Arjen Roodselaar | 2022-12-17 | 1 | -3/+6 |
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| * | | heap: encourage more spreading of heterogenous chains | gatecat | 2022-12-17 | 1 | -2/+2 |
| |/ | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | api: add explain_invalid option to isBelLocationValid | gatecat | 2022-12-07 | 2 | -4/+4 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | heap: Remove custom bounding-box type | gatecat | 2022-12-07 | 1 | -6/+0 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | netlist: Add PseudoCell API | gatecat | 2022-07-08 | 5 | -14/+50 |
| | | | | | | | | | | | | | | | | When implementing concepts such as partition pins or deliberately split nets, there's a need for something that looks like a cell (starts/ends routing with pins on nets, has timing data) but isn't mapped to a fixed bel in the architecture, but instead can have pin mappings defined at runtime. The PseudoCell allows this by providing an alternate, virtual-function based API for such cells. When a cell has `pseudo_cell` used, instead of calling functions such as getBelPinWire, getBelLocation or getCellDelay in the Arch API; such data is provided by the cell itself, fully flexible at runtime regardless of arch, via methods on the PseudoCell implementation. | ||||
| * | prefine: Do full-tile swaps, too | gatecat | 2022-04-19 | 2 | -1/+100 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | Move general parallel detail place code out of parallel_refine | gatecat | 2022-04-17 | 5 | -545/+730 |
| | | | | | Signed-off-by: gatecat <gatecat@ds0.me> | ||||
| * | Split up common into kernel,place,route | gatecat | 2022-04-08 | 11 | -0/+5580 |
| Signed-off-by: gatecat <gatecat@ds0.me> | |||||
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index : iCE40/nextpnr | |
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