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* Split up common into kernel,place,routegatecat2022-04-081-29/+0
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Fixing old emails and names in copyrightsgatecat2021-06-121-2/+2
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Split nextpnr.h to allow for linear inclusion.Keith Rothman2021-03-151-1508/+5
| | | | | | | | | | | | | | | | | | | "nextpnr.h" is no longer the god header. Important improvements: - Functions in log.h can be used without including BaseCtx/Arch/Context. This means that log_X functions can be called without included "nextpnr.h" - NPNR_ASSERT can be used without including "nextpnr.h" by including "nextpnr_assertions.h". This allows NPNR_ASSERT to be used safely in any header file. - Types defined in "archdefs.h" are now available without including BaseCtx/Arch/Context. This means that utility classes that will be used inside of BaseCtx/Arch/Context can be defined safely in a self-contained header. Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Add support for partially routed nets from the placer in router2.Keith Rothman2021-03-121-3/+6
| | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* timing: Add backwards path walkinggatecat2021-03-041-0/+5
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Remove unused advanced timing constraint APIgatecat2021-02-261-86/+0
| | | | | | | | | | | | | This API was simply an attractive nuisance as no code was ever developed to actually process timing constraints (other than clock constraints which use a different API). While I do want to consider basic false path support, among other things, in the near future; I plan for this to use a new API that doesn't add complexity to the BaseCtx/Context monstrosity and that is easier to use on the timing analysis side. Signed-off-by: gatecat <gatecat@ds0.me>
* Fix compiler warnings introduced by -Wextragatecat2021-02-251-3/+3
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Change CellInfo in getBelPinsForCellPin to be const.Keith Rothman2021-02-231-2/+2
| | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Refactor some common code to CellInfo methodsgatecat2021-02-231-0/+8
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Replace DelayInfo with DelayPair/DelayQuadgatecat2021-02-191-10/+13
| | | | | | | | | | | | | | | | | This replaces the arch-specific DelayInfo structure with new DelayPair (min/max only) and DelayQuad (min/max for both rise and fall) structures that form part of common code. This further reduces the amount of arch-specific code; and also provides useful data structures for timing analysis which will need to delay with pairs/quads of delays as it is improved. While there may be a small performance cost to arches that didn't separate the rise/fall cases (arches that aren't currently separating the min/max cases just need to be fixed...) in DelayInfo, my expectation is that inlining will mean this doesn't make much difference. Signed-off-by: gatecat <gatecat@ds0.me>
* Add DelayPair and DelayQuad structuresgatecat2021-02-191-0/+35
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Working on standing up initial constraints system.Keith Rothman2021-02-171-0/+2
| | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Remove isValidBelForCellgatecat2021-02-161-2/+0
| | | | | | | | | | | | | | | | | This Arch API dates from when we were first working out how to implement placement validity checking, and in practice is little used by the core parts of placer1/HeAP and the Arch implementation involves a lot of duplication with isBelLocationValid. In the short term; placement validity checking is better served by the combination of checkBelAvail and isValidBelForCellType before placement; followed by isBelLocationValid after placement (potentially after moving/swapping multiple cells). Longer term, removing this API makes things a bit cleaner for a new validity checking API. Signed-off-by: gatecat <gatecat@ds0.me>
* Merge pull request #575 from YosysHQ/gatecat/belpin-2gatecat2021-02-151-1/+11
|\ | | | | Support for cell pin to bel pin mappings
| * Start making use of getBelPinsForCellPin APIgatecat2021-02-101-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | This replaces getNetinfoSinkWire with 3 new functions for different use cases. At the moment all existing code has been moved to getNetinfoSinkWire with phys_idx=0 so the build doesn't break; but this won't yet function properly with more than one sink. But it provides a base on which to work on refactoring the routers to support this case. Signed-off-by: gatecat <gatecat@ds0.me>
| * Add getBelPinsForCellPin to Arch APIgatecat2021-02-101-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | This is a basic implementation, without considering "M of N" arrangements (e.g. for LUT permuation where you only want to route to 1 out of 4/6 sinks) or using a type other than IdString to identify bel pins. But this is also enough to start working out where in nextpnr will break due to removing the 1:1 cell:bel pin cardinality, as a next step. Signed-off-by: gatecat <gatecat@ds0.me>
* | Merge pull request #579 from litghost/add_control_for_split_iogatecat2021-02-121-0/+1
|\ \ | | | | | | Add control to whether GenericFrontend splits IO ports.
| * | Add control to whether GenericFrontend splits IO ports.Keith Rothman2021-02-111-0/+1
| |/ | | | | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* | Make BaseArch getDecalGraphics return an empty rangegatecat2021-02-121-1/+1
| | | | | | | | | | | | | | Fix assertion failure when opening the GUI on an arch without any decals. Signed-off-by: gatecat <gatecat@ds0.me>
* | Merge pull request #580 from litghost/add_design_loaded_state_variablegatecat2021-02-121-0/+5
|\ \ | | | | | | Add design_loaded state variable.
| * | Add design_loaded state variable.Keith Rothman2021-02-111-0/+5
| |/ | | | | | | | | | | | | This is to decouple the command line flag "--json" and enable other frontend's. Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* / Add getBelHidden and add some missing "override" statements.Keith Rothman2021-02-111-2/+5
|/ | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Remove the unused CellInfo::pins fieldgatecat2021-02-101-3/+0
| | | | | | | | | | | No arches ever actually used this to implement a Cell->Bel pin mapping, and in practice if any did try they would inevitably hit bitrot. This field had limited use in practice as it is necessary to also support cases where one cell pin maps to more than one bel pin. Removing this old field is the first step towards developing a new API for this. Signed-off-by: gatecat <gatecat@ds0.me>
* Add BaseArchRanges for default ArchRanges typesgatecat2021-02-091-0/+21
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Make BaseCtx destructor virtualgatecat2021-02-081-1/+1
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Use 'T' postfix to disambiguate LHS and RHS of usingD. Shah2021-02-081-42/+48
| | | | | | | Arches might otherwise have range types named ambigiously with the entry in ArchRanges. Signed-off-by: D. Shah <dave@ds0.me>
* Add archArgs and archArgsToId to Arch APID. Shah2021-02-051-0/+3
| | | | Signed-off-by: D. Shah <dave@ds0.me>
* ice40: Switch to BaseArchD. Shah2021-02-051-0/+1
| | | | Signed-off-by: D. Shah <dave@ds0.me>
* Add pure-virtual ArchAPI interfaceD. Shah2021-02-051-104/+198
| | | | | | | | | This splits out the pure-virtual definition of the architecture API into ArchAPI; leaving BaseArch to only provide default implementations (which can now be completely opted out of by deriving from ArchAPI instead of BaseArch). Signed-off-by: D. Shah <dave@ds0.me>
* Rename ArchBase to BaseArch for consistency with BaseCtxD. Shah2021-02-051-1/+1
| | | | Signed-off-by: D. Shah <dave@ds0.me>
* Add default implementation of bel bucket functionsD. Shah2021-02-051-5/+89
| | | | Signed-off-by: D. Shah <dave@ds0.me>
* Add default implementation of some range-returning functionsD. Shah2021-02-051-5/+27
| | | | Signed-off-by: D. Shah <dave@ds0.me>
* Add a few more functions to ArchBaseD. Shah2021-02-051-8/+14
| | | | Signed-off-by: D. Shah <dave@ds0.me>
* ecp5: Use common wire/pip bindingD. Shah2021-02-051-1/+1
| | | | Signed-off-by: D. Shah <dave@ds0.me>
* Fix now-illegal use of reinterpret_castD. Shah2021-02-051-3/+5
| | | | Signed-off-by: D. Shah <dave@ds0.me>
* nextpnr: Example of shared wire/bel/pip binding codeD. Shah2021-02-051-13/+106
| | | | | | Currently not actually being tested Signed-off-by: D. Shah <dave@ds0.me>
* nextpnr: Use templates to specify range typesD. Shah2021-02-051-0/+21
| | | | Signed-off-by: D. Shah <dave@ds0.me>
* nextpnr: Add base virtual functions for non-range Arch APID. Shah2021-02-051-0/+108
| | | | | | | | | | | | | This makes the Arch API clearer and also allows a base implementation of functions to reduce the amount of complexity to get a basic Arch up and running. Currently this only implements these for functions that don't return a range. Range-returning functions will require more work in order due to the current 'duck typing' approach (probably a struct that contains the range types combined with templating.) Signed-off-by: D. Shah <dave@ds0.me>
* Mark IdString and IdStringList single argument constructors explicit.Keith Rothman2021-02-041-4/+5
| | | | | | | | | Single argument constructors will silently convert to that type. This is typically not the right thing to do. For example, the nexus and ice40 arch_pybindings.h files were incorrectly parsing bel name strings, etc. Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* generic: Use IdStringList for all arch object namesD. Shah2021-02-021-0/+15
| | | | Signed-off-by: D. Shah <dave@ds0.me>
* nexus: Implement IdStringList for all arch object namesD. Shah2021-02-021-0/+6
| | | | Signed-off-by: D. Shah <dave@ds0.me>
* ecp5: Implement IdStringList for all arch object namesD. Shah2021-02-021-1/+24
| | | | | | | This is a complete implementation of IdStringList for ECP5; excluding the GUI (which you will have to disable for it to build). Signed-off-by: D. Shah <dave@ds0.me>
* ecp5: Proof-of-concept using IdStringList for bel namesD. Shah2021-02-021-4/+22
| | | | | | | | | | | This uses the new IdStringList API to store bel names for the ECP5. Note that other arches and the GUI do not yet build with this proof-of-concept patch. getBelByName still uses the old implementation and could be more efficiently implemented with further development. Signed-off-by: D. Shah <dave@ds0.me>
* common: First pass at IdStringList methodsD. Shah2021-02-021-3/+29
| | | | Signed-off-by: D. Shah <dave@ds0.me>
* common: Adding IdStringList typeD. Shah2021-02-021-0/+67
| | | | | | | Using an optimised storage for <=4 objects to avoid excessive heap allocations. Signed-off-by: D. Shah <dave@ds0.me>
* clangformatD. Shah2021-01-281-5/+2
| | | | Signed-off-by: D. Shah <dave@ds0.me>
* C++17 compatibility: Don't use std::random_shufflePer Grön2020-12-301-4/+10
| | | | std::random_shuffle deprecated in C++14 and was removed in C++17.
* Only print filenames for now, default onRoss Schlaikjer2020-08-301-4/+2
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* Add option to print critical path source codeRoss Schlaikjer2020-08-301-0/+5
| | | | | | | In order to make debugging the critical path easier, add an option that will log the location each net was defined, if known. If the file that contains the definition is known, and is readable, also print the part of the source HDL responsible for the signal definition.
* Port nextpnr-{ice40,ecp5} to WASI.whitequark2020-05-231-0/+14
| | | | | | | | | | | | | | | | | | | | | This involves very few changes, all typical to WASM ports: * WASM doesn't currently support threads or atomics so those are disabled. * WASM doesn't currently support exceptions so the exception machinery is stubbed out. * WASM doesn't (and can't) have mmap(), so an emulation library is used. That library currently doesn't support MAP_SHARED flags, so MAP_PRIVATE is used instead. There is also an update to bring ECP5 bbasm CMake rules to parity with iCE40 ones, since although it is possible to embed chipdb into nextpnr on WASM, a 200 MB WASM file has very few practical uses. The README is not updated and there is no included toolchain file because at the moment it's not possible to build nextpnr with upstream boost and wasi-libc. Boost requires a patch (merged, will be available in boost 1.74.0), wasi-libc requires a few unmerged patches.
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