diff options
Diffstat (limited to 'ice40')
-rw-r--r-- | ice40/gfx.cc | 36 | ||||
-rw-r--r-- | ice40/gfx.h | 96 |
2 files changed, 78 insertions, 54 deletions
diff --git a/ice40/gfx.cc b/ice40/gfx.cc index 613f1a31..1006f7b9 100644 --- a/ice40/gfx.cc +++ b/ice40/gfx.cc @@ -96,9 +96,9 @@ void gfxTileWire(std::vector<GraphicElement> &g, int x, int y, GfxTileWireId id) GraphicElement el; el.type = GraphicElement::G_LINE; - float x1 = x + 0.03 + 0.0025 * (60 - idx); - float x2 = x + 0.03 + 0.0025 * (60 - (idx ^ 1)); - float x3 = x + 0.03 + 0.0025 * (60 - (idx ^ 1) - 12); + float x1 = x + 0.03 + 0.0025 * (60 - (idx ^ 1)); + float x2 = x + 0.03 + 0.0025 * (60 - idx); + float x3 = x + 0.03 + 0.0025 * (60 - idx - 12); if (idx >= 12) { el.y1 = y; @@ -125,6 +125,14 @@ void gfxTileWire(std::vector<GraphicElement> &g, int x, int y, GfxTileWireId id) el.x1 = x2; el.x2 = x3; g.push_back(el); + + float y1 = y + 0.03 + 0.0025 * (142 - idx); + + el.y1 = y1; + el.y2 = y1; + el.x1 = x; + el.x2 = x2; + g.push_back(el); } // Horizontal Span-12 Wires @@ -148,9 +156,9 @@ void gfxTileWire(std::vector<GraphicElement> &g, int x, int y, GfxTileWireId id) GraphicElement el; el.type = GraphicElement::G_LINE; - float y1 = y + 0.03 + 0.0025 * (90 - idx); - float y2 = y + 0.03 + 0.0025 * (90 - (idx ^ 1)); - float y3 = y + 0.03 + 0.0025 * (90 - (idx ^ 1) - 2); + float y1 = y + 0.03 + 0.0025 * (90 - (idx ^ 1)); + float y2 = y + 0.03 + 0.0025 * (90 - idx); + float y3 = y + 0.03 + 0.0025 * (90 - idx - 2); if (idx >= 2) { el.x1 = x; @@ -179,6 +187,22 @@ void gfxTileWire(std::vector<GraphicElement> &g, int x, int y, GfxTileWireId id) g.push_back(el); } + // Veritcal Right Span-4 + + if (id >= TILE_WIRE_SP4_R_V_B_0 && id <= TILE_WIRE_SP4_R_V_B_47) { + int idx = id - TILE_WIRE_SP4_R_V_B_0; + GraphicElement el; + el.type = GraphicElement::G_LINE; + + float y1 = y + 0.03 + 0.0025 * (142 - idx); + + el.y1 = y1; + el.y2 = y1; + el.x1 = x + 0.6; + el.x2 = x + 1.0; + g.push_back(el); + } + // Vertical Span-12 Wires if (id >= TILE_WIRE_SP12_V_T_22 && id <= TILE_WIRE_SP12_V_T_23) { diff --git a/ice40/gfx.h b/ice40/gfx.h index fa8d51eb..07643bca 100644 --- a/ice40/gfx.h +++ b/ice40/gfx.h @@ -279,54 +279,54 @@ enum GfxTileWireId { TILE_WIRE_SP4_V_T_46, TILE_WIRE_SP4_V_T_47, - TILE_WIRE_sp4_R_V_B_0, - TILE_WIRE_sp4_R_V_B_1, - TILE_WIRE_sp4_R_V_B_2, - TILE_WIRE_sp4_R_V_B_3, - TILE_WIRE_sp4_R_V_B_4, - TILE_WIRE_sp4_R_V_B_5, - TILE_WIRE_sp4_R_V_B_6, - TILE_WIRE_sp4_R_V_B_7, - TILE_WIRE_sp4_R_V_B_8, - TILE_WIRE_sp4_R_V_B_9, - TILE_WIRE_sp4_R_V_B_10, - TILE_WIRE_sp4_R_V_B_11, - TILE_WIRE_sp4_R_V_B_12, - TILE_WIRE_sp4_R_V_B_13, - TILE_WIRE_sp4_R_V_B_14, - TILE_WIRE_sp4_R_V_B_15, - TILE_WIRE_sp4_R_V_B_16, - TILE_WIRE_sp4_R_V_B_17, - TILE_WIRE_sp4_R_V_B_18, - TILE_WIRE_sp4_R_V_B_19, - TILE_WIRE_sp4_R_V_B_20, - TILE_WIRE_sp4_R_V_B_21, - TILE_WIRE_sp4_R_V_B_22, - TILE_WIRE_sp4_R_V_B_23, - TILE_WIRE_sp4_R_V_B_24, - TILE_WIRE_sp4_R_V_B_25, - TILE_WIRE_sp4_R_V_B_26, - TILE_WIRE_sp4_R_V_B_27, - TILE_WIRE_sp4_R_V_B_28, - TILE_WIRE_sp4_R_V_B_29, - TILE_WIRE_sp4_R_V_B_30, - TILE_WIRE_sp4_R_V_B_31, - TILE_WIRE_sp4_R_V_B_32, - TILE_WIRE_sp4_R_V_B_33, - TILE_WIRE_sp4_R_V_B_34, - TILE_WIRE_sp4_R_V_B_35, - TILE_WIRE_sp4_R_V_B_36, - TILE_WIRE_sp4_R_V_B_37, - TILE_WIRE_sp4_R_V_B_38, - TILE_WIRE_sp4_R_V_B_39, - TILE_WIRE_sp4_R_V_B_40, - TILE_WIRE_sp4_R_V_B_41, - TILE_WIRE_sp4_R_V_B_42, - TILE_WIRE_sp4_R_V_B_43, - TILE_WIRE_sp4_R_V_B_44, - TILE_WIRE_sp4_R_V_B_45, - TILE_WIRE_sp4_R_V_B_46, - TILE_WIRE_sp4_R_V_B_47, + TILE_WIRE_SP4_R_V_B_0, + TILE_WIRE_SP4_R_V_B_1, + TILE_WIRE_SP4_R_V_B_2, + TILE_WIRE_SP4_R_V_B_3, + TILE_WIRE_SP4_R_V_B_4, + TILE_WIRE_SP4_R_V_B_5, + TILE_WIRE_SP4_R_V_B_6, + TILE_WIRE_SP4_R_V_B_7, + TILE_WIRE_SP4_R_V_B_8, + TILE_WIRE_SP4_R_V_B_9, + TILE_WIRE_SP4_R_V_B_10, + TILE_WIRE_SP4_R_V_B_11, + TILE_WIRE_SP4_R_V_B_12, + TILE_WIRE_SP4_R_V_B_13, + TILE_WIRE_SP4_R_V_B_14, + TILE_WIRE_SP4_R_V_B_15, + TILE_WIRE_SP4_R_V_B_16, + TILE_WIRE_SP4_R_V_B_17, + TILE_WIRE_SP4_R_V_B_18, + TILE_WIRE_SP4_R_V_B_19, + TILE_WIRE_SP4_R_V_B_20, + TILE_WIRE_SP4_R_V_B_21, + TILE_WIRE_SP4_R_V_B_22, + TILE_WIRE_SP4_R_V_B_23, + TILE_WIRE_SP4_R_V_B_24, + TILE_WIRE_SP4_R_V_B_25, + TILE_WIRE_SP4_R_V_B_26, + TILE_WIRE_SP4_R_V_B_27, + TILE_WIRE_SP4_R_V_B_28, + TILE_WIRE_SP4_R_V_B_29, + TILE_WIRE_SP4_R_V_B_30, + TILE_WIRE_SP4_R_V_B_31, + TILE_WIRE_SP4_R_V_B_32, + TILE_WIRE_SP4_R_V_B_33, + TILE_WIRE_SP4_R_V_B_34, + TILE_WIRE_SP4_R_V_B_35, + TILE_WIRE_SP4_R_V_B_36, + TILE_WIRE_SP4_R_V_B_37, + TILE_WIRE_SP4_R_V_B_38, + TILE_WIRE_SP4_R_V_B_39, + TILE_WIRE_SP4_R_V_B_40, + TILE_WIRE_SP4_R_V_B_41, + TILE_WIRE_SP4_R_V_B_42, + TILE_WIRE_SP4_R_V_B_43, + TILE_WIRE_SP4_R_V_B_44, + TILE_WIRE_SP4_R_V_B_45, + TILE_WIRE_SP4_R_V_B_46, + TILE_WIRE_SP4_R_V_B_47, TILE_WIRE_SP4_H_L_36, TILE_WIRE_SP4_H_L_37, |