diff options
Diffstat (limited to 'ice40/gfx.h')
| -rw-r--r-- | ice40/gfx.h | 96 |
1 files changed, 48 insertions, 48 deletions
diff --git a/ice40/gfx.h b/ice40/gfx.h index fa8d51eb..07643bca 100644 --- a/ice40/gfx.h +++ b/ice40/gfx.h @@ -279,54 +279,54 @@ enum GfxTileWireId { TILE_WIRE_SP4_V_T_46, TILE_WIRE_SP4_V_T_47, - TILE_WIRE_sp4_R_V_B_0, - TILE_WIRE_sp4_R_V_B_1, - TILE_WIRE_sp4_R_V_B_2, - TILE_WIRE_sp4_R_V_B_3, - TILE_WIRE_sp4_R_V_B_4, - TILE_WIRE_sp4_R_V_B_5, - TILE_WIRE_sp4_R_V_B_6, - TILE_WIRE_sp4_R_V_B_7, - TILE_WIRE_sp4_R_V_B_8, - TILE_WIRE_sp4_R_V_B_9, - TILE_WIRE_sp4_R_V_B_10, - TILE_WIRE_sp4_R_V_B_11, - TILE_WIRE_sp4_R_V_B_12, - TILE_WIRE_sp4_R_V_B_13, - TILE_WIRE_sp4_R_V_B_14, - TILE_WIRE_sp4_R_V_B_15, - TILE_WIRE_sp4_R_V_B_16, - TILE_WIRE_sp4_R_V_B_17, - TILE_WIRE_sp4_R_V_B_18, - TILE_WIRE_sp4_R_V_B_19, - TILE_WIRE_sp4_R_V_B_20, - TILE_WIRE_sp4_R_V_B_21, - TILE_WIRE_sp4_R_V_B_22, - TILE_WIRE_sp4_R_V_B_23, - TILE_WIRE_sp4_R_V_B_24, - TILE_WIRE_sp4_R_V_B_25, - TILE_WIRE_sp4_R_V_B_26, - TILE_WIRE_sp4_R_V_B_27, - TILE_WIRE_sp4_R_V_B_28, - TILE_WIRE_sp4_R_V_B_29, - TILE_WIRE_sp4_R_V_B_30, - TILE_WIRE_sp4_R_V_B_31, - TILE_WIRE_sp4_R_V_B_32, - TILE_WIRE_sp4_R_V_B_33, - TILE_WIRE_sp4_R_V_B_34, - TILE_WIRE_sp4_R_V_B_35, - TILE_WIRE_sp4_R_V_B_36, - TILE_WIRE_sp4_R_V_B_37, - TILE_WIRE_sp4_R_V_B_38, - TILE_WIRE_sp4_R_V_B_39, - TILE_WIRE_sp4_R_V_B_40, - TILE_WIRE_sp4_R_V_B_41, - TILE_WIRE_sp4_R_V_B_42, - TILE_WIRE_sp4_R_V_B_43, - TILE_WIRE_sp4_R_V_B_44, - TILE_WIRE_sp4_R_V_B_45, - TILE_WIRE_sp4_R_V_B_46, - TILE_WIRE_sp4_R_V_B_47, + TILE_WIRE_SP4_R_V_B_0, + TILE_WIRE_SP4_R_V_B_1, + TILE_WIRE_SP4_R_V_B_2, + TILE_WIRE_SP4_R_V_B_3, + TILE_WIRE_SP4_R_V_B_4, + TILE_WIRE_SP4_R_V_B_5, + TILE_WIRE_SP4_R_V_B_6, + TILE_WIRE_SP4_R_V_B_7, + TILE_WIRE_SP4_R_V_B_8, + TILE_WIRE_SP4_R_V_B_9, + TILE_WIRE_SP4_R_V_B_10, + TILE_WIRE_SP4_R_V_B_11, + TILE_WIRE_SP4_R_V_B_12, + TILE_WIRE_SP4_R_V_B_13, + TILE_WIRE_SP4_R_V_B_14, + TILE_WIRE_SP4_R_V_B_15, + TILE_WIRE_SP4_R_V_B_16, + TILE_WIRE_SP4_R_V_B_17, + TILE_WIRE_SP4_R_V_B_18, + TILE_WIRE_SP4_R_V_B_19, + TILE_WIRE_SP4_R_V_B_20, + TILE_WIRE_SP4_R_V_B_21, + TILE_WIRE_SP4_R_V_B_22, + TILE_WIRE_SP4_R_V_B_23, + TILE_WIRE_SP4_R_V_B_24, + TILE_WIRE_SP4_R_V_B_25, + TILE_WIRE_SP4_R_V_B_26, + TILE_WIRE_SP4_R_V_B_27, + TILE_WIRE_SP4_R_V_B_28, + TILE_WIRE_SP4_R_V_B_29, + TILE_WIRE_SP4_R_V_B_30, + TILE_WIRE_SP4_R_V_B_31, + TILE_WIRE_SP4_R_V_B_32, + TILE_WIRE_SP4_R_V_B_33, + TILE_WIRE_SP4_R_V_B_34, + TILE_WIRE_SP4_R_V_B_35, + TILE_WIRE_SP4_R_V_B_36, + TILE_WIRE_SP4_R_V_B_37, + TILE_WIRE_SP4_R_V_B_38, + TILE_WIRE_SP4_R_V_B_39, + TILE_WIRE_SP4_R_V_B_40, + TILE_WIRE_SP4_R_V_B_41, + TILE_WIRE_SP4_R_V_B_42, + TILE_WIRE_SP4_R_V_B_43, + TILE_WIRE_SP4_R_V_B_44, + TILE_WIRE_SP4_R_V_B_45, + TILE_WIRE_SP4_R_V_B_46, + TILE_WIRE_SP4_R_V_B_47, TILE_WIRE_SP4_H_L_36, TILE_WIRE_SP4_H_L_37, |