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| author | myrtle <gatecat@ds0.me> | 2023-01-27 11:20:35 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-01-27 11:20:35 +0100 |
| commit | d661d117af9b447a1ef6dc056742c521dbb33259 (patch) | |
| tree | 2e7578b8e3677cd946a2cc8254dfec35ba357558 /gowin/arch.h | |
| parent | 9b5e5f124c186942652e6be03c356cf0edf88124 (diff) | |
| parent | 2d45d57b3246814ad20988c6ecf941180faf58a6 (diff) | |
| download | nextpnr-d661d117af9b447a1ef6dc056742c521dbb33259.tar.gz nextpnr-d661d117af9b447a1ef6dc056742c521dbb33259.tar.bz2 nextpnr-d661d117af9b447a1ef6dc056742c521dbb33259.zip | |
Merge pull request #1085 from yrabbit/gw1nr-9c-pll
gowin: Add PLL support for the GW1NR-9C chip
Diffstat (limited to 'gowin/arch.h')
| -rw-r--r-- | gowin/arch.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/gowin/arch.h b/gowin/arch.h index 0dd5a62b..f060165a 100644 --- a/gowin/arch.h +++ b/gowin/arch.h @@ -478,8 +478,8 @@ struct Arch : BaseArch<ArchRanges> void pre_route(Context *ctx); void post_route(Context *ctx); void auto_longwires(); - void add_plla_ports(BelsPOD const *bel, IdString belname, int row, int col); void add_pllvr_ports(DatabasePOD const *db, BelsPOD const *bel, IdString belname, int row, int col); + void add_rpll_ports(DatabasePOD const *db, BelsPOD const *bel, IdString belname, int row, int col); void fix_pll_nets(Context *ctx); bool is_GCLKT_iob(const CellInfo *cell); |