aboutsummaryrefslogtreecommitdiffstats
Commit message (Expand)AuthorAgeFilesLines
* Add missing 5k BRAM bitsDavid Shah2017-11-174-7/+1277
* Make 5k db as a default targetDavid Shah2017-11-171-1/+2
* Remove non-existing routing resources (5k)David Shah2017-11-171-2/+3
* Add support for UltraPlus SPRAMDavid Shah2017-11-174-238/+496
* Add UltraPlus LED driver support and demoDavid Shah2017-11-176-11/+171
* UltraPlus Internal Oscillator supportDavid Shah2017-11-172-1/+34
* UltraPlus DSPs workingDavid Shah2017-11-175-1/+95
* Add new tile types and MAC16s to chipdbDavid Shah2017-11-172-4/+138
* Tidy up some of the icebox changesDavid Shah2017-11-171-44/+53
* 5k RGB driver reverse engineeredDavid Shah2017-11-174-0/+223
* Fix 5k corner routing, and reverse engineer SPRAMDavid Shah2017-11-175-20/+523
* Figure out DSP config bits for all locsDavid Shah2017-11-174-3/+184
* Start UltraPlus DSP documentationDavid Shah2017-11-173-2/+160
* Trace DSP routingDavid Shah2017-11-175-350/+6534
* Create icefuzz scripts for DSP and 5kDavid Shah2017-11-1713-986/+16479
* Preparations for DSP and IpCon fuzzingDavid Shah2017-11-089-10/+75
* Fix 5k gbin configurationDavid Shah2017-11-061-2/+2
* Add more 5k RAM bits to dbDavid Shah2017-11-053-4/+1329
* Fix 5k padin_glb_netwk bitsDavid Shah2017-11-051-8/+8
* 5k-related fixes to icepackDavid Shah2017-11-051-22/+64
* Add 5k colbuf fuzzing scriptsDavid Shah2017-11-024-0/+172
* Fix global network 1 padin bitDavid Shah2017-11-011-2/+2
* Work on 5k global buffer padsDavid Shah2017-11-011-8/+10
* Fix BRAM initialisation on 5k partsDavid Shah2017-11-011-4/+5
* Merge branch 'master' into ultraplus_experimentsDavid Shah2017-11-010-0/+0
|\
| * Merge branch 'daveshah1-u5k'Clifford Wolf2017-10-3125-125/+1286
| |\
* | | Add missing up5k global buffer padsDavid Shah2017-10-311-1/+4
| |/ |/|
* | Working up5k PLL supportDavid Shah2017-10-311-63/+61
* | Fix loading 5k asc filesDavid Shah2017-10-311-1/+1
* | PLL configuration fuzzing scriptDavid Shah2017-10-303-0/+316
* | Add new 5k IO config bits to databaseDavid Shah2017-10-291-3/+21
* | Share glb_netwk data between 5k and 8k partsDavid Shah2017-10-293-82/+101
* | Fix global network data for up5kDavid Shah2017-10-251-9/+9
* | Fix colbuf db for up5kDavid Shah2017-10-251-5/+7
* | Add ColBufCtrl bits to database for 5k partsDavid Shah2017-10-252-100/+76
* | Add CarryInSet bit to DBDavid Shah2017-10-241-0/+3
* | Add some verilog tests for analysing up5k featuresDavid Shah2017-10-238-0/+216
* | Fix IeRen database for up5kDavid Shah2017-10-234-97/+91
* | Swap IEREN for pin 26 to get example working, other inputs still need fixingDavid Shah2017-10-212-2/+73
* | Basic example, outputs work but inputs don'tDavid Shah2017-10-214-0/+53
* | Fix RAM tile location in icebox.pyDavid Shah2017-10-211-1/+1
* | Fix icebox to generate a working chipdbDavid Shah2017-10-211-4/+4
* | Add DSP and IPConnect tile support to icepack and glbcheckDavid Shah2017-10-212-8/+19
* | Bring chip data in icebox in line with icepack - and icecubeDavid Shah2017-10-211-50/+50
* | Modify icebox.py so it generates a 5k chipdbDavid Shah2017-10-202-30/+390
* | Add (attempt at) IeRen mapping for 5kDavid Shah2017-10-201-0/+98
* | Fix make_ram40 for UltraPlusDavid Shah2017-10-201-3/+7
* | Fix case where make_prim allocates all global buffer pinsDavid Shah2017-10-201-1/+21
* | Quick fix of pin 23 issue (pending further discussion)David Shah2017-10-201-1/+3
|/
* Merge pull request #104 from HarmonInstruments/masterClifford Wolf2017-10-131-3/+31
|\
generated by cgit v1.2.3 (git 2.25.1) at 2025-04-03 15:57:06 +0000