iCE40/ghdl - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	testsuite/synth: check ram in mem01 and mem02	Tristan Gingold	2021-06-21	1	-7/+3
\|
*	testsuite/synth: add a test for previous commit	Tristan Gingold	2020-04-22	3	-1/+122
\|
*	testsuites/synth: add missing files.	Tristan Gingold	2020-02-23	2	-0/+97
\|
*	testsuite/synth: add tests for memory ports order.	Tristan Gingold	2020-02-23	3	-2/+32
\|
*	testsuite/synth: add a source for mem01	Tristan Gingold	2020-02-20	2	-0/+31
\|
*	testsuite/synth: merge ram01 to mem01, add NOTES.txt	Tristan Gingold	2020-02-18	6	-1/+148
\|
*	testsuite/synth: rename arr02 to mem01	Tristan Gingold	2019-09-11	9	-0/+277