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* synth: handle more signed operations. For #1101Tristan Gingold2020-01-193-13/+59
* synth-oper: handle more signed comparisons. For #1101Tristan Gingold2020-01-191-9/+93
* synth-stmts: allow slice within a record element. Fix #1100.Tristan Gingold2020-01-191-4/+0
* netlists-builders: relax assertion. Fix #1099Tristan Gingold2020-01-191-1/+0
* synth-expr: remove unused with-ed package.Tristan Gingold2020-01-181-1/+0
* synth: rewrite to work-around old compiler wrong warning.Tristan Gingold2020-01-181-10/+4
* synth: fix a typo in a comment.Tristan Gingold2020-01-181-1/+1
* synth: handle deferred constants. Fix #1096Tristan Gingold2020-01-162-1/+4
* netlists-disp_vhdl: display memory content in user order.Tristan Gingold2020-01-161-5/+6
* netlists-memories: fix split of memory content. FixTristan Gingold2020-01-161-4/+131
* ortho/mcode: use arch64 binary format for mach-OTristan Gingold2020-01-161-1/+1
* ynth-inference: refactoring.Tristan Gingold2020-01-161-23/+21
* synth-decls: add comments.Tristan Gingold2020-01-161-0/+3
* synth-insts: clear before applying block configuration. Fix #1095Tristan Gingold2020-01-151-0/+2
* netlists: use a mark and sweep cleanup.Tristan Gingold2020-01-154-1/+126
* vhdl: relax rule for choice expression staticness.Tristan Gingold2020-01-151-0/+9
* netlists-memories: allow initialized rams. For #1090Tristan Gingold2020-01-131-1/+2
* synth: improve support for expanded names. For #1090Tristan Gingold2020-01-131-1/+3
* synth: remove wbound field of bound_type.Tristan Gingold2020-01-137-36/+14
* synth-insts: handle slice name as actual to unboundedTristan Gingold2020-01-131-0/+20
* synth-insts: handle unbounded ports in components.Tristan Gingold2020-01-131-39/+49
* netlists-disp_vhdl: do not display the chain port for mem_rd_sync. For #1087Tristan Gingold2020-01-131-45/+53
* synth: handle static "-" for unsigned. For of #1087Tristan Gingold2020-01-133-0/+59
* synth-static_oper: handle unary not for std_logic. For #1080Tristan Gingold2020-01-121-0/+5
* synth-expr: fix crash with negative values. Fix #1086Tristan Gingold2020-01-121-2/+2
* synth-expr: handle negative value in decompose_mul_add.Tristan Gingold2020-01-121-5/+16
* synth-decls: do subtype conversion for signal default value.Tristan Gingold2020-01-121-0/+2
* netlists: get_net_uns64: handle id_const_sb32.Tristan Gingold2020-01-121-0/+11
* netlists-utils: consider 0 bit net as static.Tristan Gingold2020-01-121-0/+6
* netlists-utils: factorize code (same_net).Tristan Gingold2020-01-122-51/+25
* netlists-disp_vhdl: handle 0 bit truncation.Tristan Gingold2020-01-121-0/+2
* netlists-builders: allow more gates with null bus. For #1080Tristan Gingold2020-01-121-2/+0
* llvm4-nodebug: remove verbose code.Tristan Gingold2020-01-121-3/+0
* msys2-mingw: build llvm with --static-link (tentatively fix ci)Tristan Gingold2020-01-121-1/+1
* netlists-memories: allow intermediate signals to detect sync read.Tristan Gingold2020-01-123-2/+18
* ortho/llvm4-nodebug: pass --link-static to llvm-config.Tristan Gingold2020-01-121-1/+1
* synth-decls: always initialize variables. Fix #1081Tristan Gingold2020-01-121-7/+2
* netlists-disp_vhdl: handle const_log for disp_memory.Tristan Gingold2020-01-121-0/+5
* llvm4-nodebug: investigate CI failure.Tristan Gingold2020-01-121-1/+2
* synth: fix element order for simple aggregates. For #1080Tristan Gingold2020-01-121-1/+1
* synth: convert constant default value subtype. For #1080Tristan Gingold2020-01-121-0/+1
* llvm4-nodebug: add verbosity to debug CI failures.Tristan Gingold2020-01-121-1/+5
* synth: handle constants in assignments. Fix for #1080Tristan Gingold2020-01-123-1/+11
* synth-expr: handle pos attribute. For #1080Tristan Gingold2020-01-121-0/+12
* synth: use formal instance to evaluate default value. For #1080Tristan Gingold2020-01-121-1/+4
* netlists-disp_vhdl: handle one bit memories. Fix #1083Tristan Gingold2020-01-121-2/+6
* netlists: Handle sdiv and udiv (#1082)Anton Blanchard2020-01-111-0/+6
* synth: add --expect-failure for command --synthTristan Gingold2020-01-112-2/+20
* synth-cleanup: avoid a crash on undriven output. Fix #1078Tristan Gingold2020-01-111-3/+5
* vhdl: recognize predefined shift operators for ieee.numeric_std. For #1077Tristan Gingold2020-01-112-6/+39
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