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authorTristan Gingold <tgingold@free.fr>2020-01-12 21:06:16 +0100
committerTristan Gingold <tgingold@free.fr>2020-01-12 21:06:16 +0100
commit0baaab9bb57234496f1ebaf90e28f4b8cc32d29a (patch)
tree43f2c06ab99c9fb6ff095bac9b4543faa667eceb /src
parent9f75c27b3a721f7cd947a47e24d289bf971cc3dd (diff)
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netlists-utils: factorize code (same_net).
Diffstat (limited to 'src')
-rw-r--r--src/synth/netlists-utils.adb39
-rw-r--r--src/synth/synth-expr.adb37
2 files changed, 25 insertions, 51 deletions
diff --git a/src/synth/netlists-utils.adb b/src/synth/netlists-utils.adb
index 3f9a9fd46..5e6a5c269 100644
--- a/src/synth/netlists-utils.adb
+++ b/src/synth/netlists-utils.adb
@@ -242,10 +242,7 @@ package body Netlists.Utils is
Free_Instance (Inst);
end Disconnect_And_Free;
- function Same_Net (L, R : Net) return Boolean
- is
- Linst : Instance;
- Rinst : Instance;
+ function Same_Net (L, R : Net) return Boolean is
begin
if L = R then
-- Obvious case.
@@ -257,17 +254,29 @@ package body Netlists.Utils is
return False;
end if;
- -- Handle extract.
- Linst := Get_Net_Parent (L);
- if Get_Id (Linst) /= Id_Extract then
- return False;
- end if;
- Rinst := Get_Net_Parent (R);
- if Get_Id (Rinst) /= Id_Extract then
- return False;
- end if;
- return Get_Input_Net (Linst, 0) = Get_Input_Net (Rinst, 0)
- and then Get_Param_Uns32 (Linst, 0) = Get_Param_Uns32 (Rinst, 0);
+ declare
+ Linst : constant Instance := Get_Net_Parent (L);
+ Rinst : constant Instance := Get_Net_Parent (R);
+ begin
+ if Get_Id (Linst) /= Get_Id (Rinst) then
+ return False;
+ end if;
+ case Get_Id (Linst) is
+ when Id_Uextend =>
+ -- When index is extended from a subtype.
+ return Same_Net (Get_Input_Net (Linst, 0),
+ Get_Input_Net (Rinst, 0));
+ when Id_Extract =>
+ -- When index is extracted from a record.
+ if Get_Param_Uns32 (Linst, 0) /= Get_Param_Uns32 (Rinst, 0) then
+ return False;
+ end if;
+ return Same_Net (Get_Input_Net (Linst, 0),
+ Get_Input_Net (Rinst, 0));
+ when others =>
+ return False;
+ end case;
+ end;
end Same_Net;
function Clog2 (W : Width) return Width is
diff --git a/src/synth/synth-expr.adb b/src/synth/synth-expr.adb
index 9a5aa23e4..cffd17c34 100644
--- a/src/synth/synth-expr.adb
+++ b/src/synth/synth-expr.adb
@@ -1242,41 +1242,6 @@ package body Synth.Expr is
end loop;
end Decompose_Mul_Add;
- function Is_Same (L, R : Net) return Boolean is
- begin
- if L = R then
- return True;
- end if;
-
- if Get_Width (L) /= Get_Width (R) then
- return False;
- end if;
-
- declare
- Linst : constant Instance := Get_Net_Parent (L);
- Rinst : constant Instance := Get_Net_Parent (R);
- begin
- if Get_Id (Linst) /= Get_Id (Rinst) then
- return False;
- end if;
- case Get_Id (Linst) is
- when Id_Uextend =>
- -- When index is extended from a subtype.
- return Is_Same (Get_Input_Net (Linst, 0),
- Get_Input_Net (Rinst, 0));
- when Id_Extract =>
- -- When index is extracted from a record.
- if Get_Param_Uns32 (Linst, 0) /= Get_Param_Uns32 (Rinst, 0) then
- return False;
- end if;
- return Is_Same (Get_Input_Net (Linst, 0),
- Get_Input_Net (Rinst, 0));
- when others =>
- return False;
- end case;
- end;
- end Is_Same;
-
-- Identify LEFT to/downto RIGHT as:
-- INP * STEP + WIDTH - 1 + OFF to/downto INP * STEP + OFF
procedure Synth_Extract_Dyn_Suffix (Loc : Node;
@@ -1309,7 +1274,7 @@ package body Synth.Expr is
Decompose_Mul_Add (Right, R_Inp, R_Fac, R_Add);
end if;
- if not Is_Same (L_Inp, R_Inp) then
+ if not Same_Net (L_Inp, R_Inp) then
Error_Msg_Synth
(+Loc, "cannot extract same variable part for dynamic slice");
return;