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* vhdl/translate: handle predefined operators as conversion functionsTristan Gingold2022-11-073-44/+73
* vhdl-sem_expr(sem_qualified_expression): relax staticness rules.Tristan Gingold2022-11-021-1/+11
* vhdl-sem_names(sem_name_free): handle iir_kind_slice_name. For #2233Tristan Gingold2022-10-291-0/+1
* vhdl-evaluation: handle to_string_digits. For #2233Tristan Gingold2022-10-291-5/+50
* vhdl-sem_assocs: handle association with external signal names.Tristan Gingold2022-10-184-63/+77
* vhdl-sem_expr.adb: avoid crash after error on aggregate. Fix #2218Tristan Gingold2022-10-161-0/+6
* vhdl-sem_expr.adb(is_string_type): check character type.Tristan Gingold2022-10-161-1/+3
* vhdl-parse.adb: handle external names as assignment target.Tristan Gingold2022-10-141-2/+4
* vhdl-canon: avoid a crash on optionnal condition. Fix #2212Tristan Gingold2022-10-101-1/+1
* vhdl-sem.adb(are_trees_equal): handle parenthesis expressions.Tristan Gingold2022-10-081-0/+4
* translate, grt: add lib function for div and rem.Tristan Gingold2022-10-023-8/+84
* synth: handle read for floatsTristan Gingold2022-09-301-8/+12
* vhdl-canon: extract guard for signal assignment sensitivityTristan Gingold2022-09-291-1/+15
* vhdl-sem: avoid a crash after error. Fix #2201Tristan Gingold2022-09-281-0/+1
* synth: rework error procedure, always pass the instanceTristan Gingold2022-09-251-2/+2
* vhdl-sem_decls: handle protected type subtypesTristan Gingold2022-09-251-1/+4
* vhdl-sem_names: handle architecture bodies in sem_denoting_nameTristan Gingold2022-09-251-1/+2
* synth: rename vhdl.annotations to elab.vhdl_annotationsTristan Gingold2022-09-192-1698/+0
* synth: rework subprogram associations (WIP)Tristan Gingold2022-09-191-1/+3
* synth: factorize code (reuse synth_constant_declaration)Tristan Gingold2022-09-171-2/+0
* synth: handle vhdl-87 filesTristan Gingold2022-09-151-2/+8
* synth: handle access subtypesTristan Gingold2022-09-151-1/+1
* trans-chap7: fix choice of exp. Fix #2189Tristan Gingold2022-09-151-3/+3
* simul: add support for protected objectsTristan Gingold2022-09-081-1/+1
* synth: use areapoolsTristan Gingold2022-09-022-4/+3
* vhdl-sem_assocs: improve error messageTristan Gingold2022-08-251-1/+1
* vhdl-prints: improve handling of PSL. For #2178Tristan Gingold2022-08-151-5/+75
* vhdl: add iir_kind_psl_boolean_parameter node. For #2178Tristan Gingold2022-08-1513-226/+292
* vhdl: recognize log10 and sqrt from math_real. Fix #2176Tristan Gingold2022-08-141-0/+4
* trans-chap3: fix invalid copy of element layout. For #2166Tristan Gingold2022-08-121-2/+4
* vhdl: add support for file subtype. Fix #2174Tristan Gingold2022-08-1112-262/+329
* vhdl-sem_stmts: handle external signal names in force assign. Fix #2173Tristan Gingold2022-08-111-1/+5
* vhdl-parse.adb: parse pathname expressionTristan Gingold2022-08-111-0/+10
* vhdl-sem_stmts.adb: handle signal assignment to external names. Fix #2172Tristan Gingold2022-08-111-0/+4
* vhdl-sem_expr: fix a crash on invalid aggregate. Fix #2131Tristan Gingold2022-08-111-15/+30
* trans-chap5: handle inertial individual association. Fix #2118Tristan Gingold2022-08-111-13/+20
* vhdl-sem_expr: add an error message for unbounded element aggregate.Tristan Gingold2022-08-111-7/+12
* trans-chap7: handle concat of unbounded elements. Fix #2055Tristan Gingold2022-08-111-33/+58
* vhdl-sem_names: factorize code for element attributeTristan Gingold2022-08-101-56/+10
* trans: rework aggregate. For #2166Tristan Gingold2022-08-103-58/+65
* vhdl: add Determined_Aggregate_Flag field. For #2166Tristan Gingold2022-08-105-134/+177
* vhdl: add an owner to interface type definitionTristan Gingold2022-08-076-187/+233
* vhdl-sem_names.adb(are_types_closely_related): handle vhdl08 definitionTristan Gingold2022-08-071-14/+24
* vhdl-sem.adb: lexical conformance is now a relaxed error. Fix #2165Tristan Gingold2022-08-071-2/+3
* vhdl-sem.adb(are_trees_equal): handle qualified expressions. Fix #2164Tristan Gingold2022-08-071-1/+2
* vhdl-sem_assocs: add commentsTristan Gingold2022-08-071-0/+7
* vhdl-prints: handle default in interface subprogramTristan Gingold2022-08-071-1/+19
* vhdl: add support for default in interface subprogram. Fix #2163Tristan Gingold2022-08-0712-419/+649
* vhdl-prints.adb: avoid crash on PSL endpointsTristan Gingold2022-08-041-3/+12
* trans-chap9.adb: destroy types in PSL expressions. For #2157Tristan Gingold2022-08-041-3/+31
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