iCE40/ghdl - [no description]

	Commit message (Collapse)	Author	Age	Files	Lines
*	synth: handle non-constant array aggregates.	Tristan Gingold	2019-09-05	2	-1/+15
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*	synth: add netlists.concats	Tristan Gingold	2019-09-05	3	-31/+140
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*	synth: add value_const_array.	Tristan Gingold	2019-09-05	4	-18/+68
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*	synth-disp_vhdl: handle arrays in disp_out_converter.	Tristan Gingold	2019-09-05	1	-1/+19
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*	synth: handle const_bit in disp_constant_inline.	Tristan Gingold	2019-09-04	1	-0/+4
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*	synth: handle large width in get_net.	Tristan Gingold	2019-09-04	2	-4/+14
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*	synth-disp_vhdl: handle records for outputs.	Tristan Gingold	2019-09-04	1	-42/+76
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*	synth-disp_vhdl: handle record for input ports.	Tristan Gingold	2019-09-03	7	-41/+108
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*	synth: subtype conversion before compare.	Tristan Gingold	2019-09-03	1	-2/+7
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*	synth: handle conditional variable assignment.	Tristan Gingold	2019-09-02	1	-0/+34
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*	vhdl synth: recognize more operators (add uns log).	Tristan Gingold	2019-09-02	1	-7/+56
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*	synth: remove insert gate.	Tristan Gingold	2019-08-31	4	-70/+0
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*	synth: improve synth_uresize.	Tristan Gingold	2019-08-31	3	-26/+50
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*	synth: elab subprogram interfaces subtype	Tristan Gingold	2019-08-31	1	-2/+13
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*	[PATCH] synth-environment: fix thinkos.	Tristan Gingold	2019-08-31	1	-14/+57
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*	synth: add physical division (#904)	tgingold	2019-08-30	1	-1/+11
\|\ \| \| \| \| \| \| \| \| \| \|	* synth: added division of physical type * testsuite/synth: added test for the physical division
\| *	synth: added division of physical type	Martin Doerfelt	2019-08-30	1	-1/+11
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* \|	synth: add support for --synth on llvm, link with -lm.	Tristan Gingold	2019-08-30	1	-0/+4
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* \|	synth: fix type elaboration of interfaces.	Tristan Gingold	2019-08-30	1	-2/+0
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* \|	synth: remove unused const gates.	Tristan Gingold	2019-08-30	2	-13/+5
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* \|	synth: ignore report statement.	Tristan Gingold	2019-08-30	1	-0/+2
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* \|	vhdl: recognize 1164 condition operator, handle in synth.	Tristan Gingold	2019-08-30	1	-0/+2
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* \|	synth: handle enumeration subtype in ranges.	Tristan Gingold	2019-08-30	1	-1/+2
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* \|	synth: fix named association in record aggregate.	Tristan Gingold	2019-08-30	1	-1/+3
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*	synth: add support for record types.	Tristan Gingold	2019-08-29	12	-82/+357
\| \| \| \|	(WIP: need to fix regression of stmt01).
*	synth: Integer operators (#902)	marph91	2019-08-28	1	-0/+16
\| \| \| \| \| \| \| \|	* synth: added missing integer operators I. e. inequality and remainder. * testsuite/synth: added testcase for the missing integer operators
*	synth: support sequential conditional signal assignment.	Tristan Gingold	2019-08-27	1	-0/+2
\| \| \| \|	Fix tgingold/ghdlsynth-beta#40
*	synth: rework partial assignments	Tristan Gingold	2019-08-27	10	-182/+608
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*	netlists-disp_vhdl: do not used literals for prefixes.	Tristan Gingold	2019-08-27	1	-12/+53
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*	synth: add support for constant exponentiation.	Tristan Gingold	2019-08-20	1	-0/+10
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*	synth: set name to assert/assume gates.	Tristan Gingold	2019-08-20	4	-12/+44
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*	netlist: fix minor pasto.	Tristan Gingold	2019-08-20	1	-1/+1
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*	initial support for reduce and/or (#900)	Pepijn de Vos	2019-08-20	3	-1/+30
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*	vhdl: handle assume in verification units.	Tristan Gingold	2019-08-20	1	-0/+2
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*	synth: set location on assume/assert gates.	Tristan Gingold	2019-08-20	3	-8/+19
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*	synth: handle verification units.	Tristan Gingold	2019-08-20	3	-2/+37
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*	synth: handle array attribute "length" (#895)	marph91	2019-08-19	1	-0/+10
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*	synth: fix tgingold/ghdlsynth#34 (association).	Tristan Gingold	2019-08-17	1	-2/+1
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*	synth: handle integer values in subtype conversion.	Tristan Gingold	2019-08-16	1	-0/+2
\| \| \| \|	For tgingold/ghdlsynth-beta#33
*	synth: handle integers for displaying vhdl ports.	Tristan Gingold	2019-08-16	1	-0/+10
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*	vhdl: declare verification units (WIP).	Tristan Gingold	2019-08-16	1	-0/+2
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*	synth: handle array attributes; handle integer subtypes in generics.	Tristan Gingold	2019-08-16	2	-2/+91
\| \| \| \|	Fix tgingold/ghdlsynth-beta#32
*	add synthesis support for logic operators on numeric types (#893)	Pepijn de Vos	2019-08-15	2	-4/+35
\| \| \| \| \| \| \| \|	* add logic operators on unsigned * handle signed too * handle unary not
*	synth: fix handling of assume/assert.	Tristan Gingold	2019-08-14	1	-6/+65
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*	ghdlsynth: declare init_for_ghdl_synth.	Tristan Gingold	2019-08-14	1	-1/+4
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*	vhdl: handle PSL keywords as vhdl08 reserved words; switch to PSL scanner mode.	Tristan Gingold	2019-08-14	1	-0/+3
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*	synth: also extract edge in PSL expressions.	Tristan Gingold	2019-08-13	3	-18/+36
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*	synth: extract edge for PSL clocks.	Tristan Gingold	2019-08-13	1	-27/+34
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*	libghdlsynth: make it almost empty, as libghdl will be used instead.	Tristan Gingold	2019-08-13	1	-8/+0
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*	Support for PSL assert and assume in synthesis (#892)	Pepijn de Vos	2019-08-13	1	-4/+53
\| \| \| \| \| \| \| \|	* initial support for PSL assert and assume * add support for true, false, and, or in psl synth * update testsuite with new psl things