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* synth: improve support of slices.Tristan Gingold2019-09-111-50/+54
* testsuite/synth: add mem02Tristan Gingold2019-09-113-0/+84
* synth: introduce slice type.Tristan Gingold2019-09-114-1/+26
* testsuite/synth: rename arr02 to mem01Tristan Gingold2019-09-119-0/+0
* synth: Add width field in type_type record.Tristan Gingold2019-09-116-109/+119
* synth: handle alias (WIP, read only).Tristan Gingold2019-09-117-12/+86
* vhdl: recognize numeric_std shift_left.Tristan Gingold2019-09-116-220/+254
* fix: skip testsuite/sanity/005examples when 'docs' not found (#921)1138-4EB2019-09-111-0/+6
* synth: add const_sb32, add smul/umul.Tristan Gingold2019-09-076-13/+105
* vhdl: recognize numeric_std mul.Tristan Gingold2019-09-073-82/+115
* testsuite/synth: add testcase for previous commit.Tristan Gingold2019-09-073-0/+77
* synth: handle partial assignments in case statements.Tristan Gingold2019-09-073-44/+95
* synth-expr: fix regression of issue 7Tristan Gingold2019-09-061-1/+2
* synth: abstract of Merge_Assigns.Tristan Gingold2019-09-061-56/+111
* testsuite: add testcase for ghdl/ghdl-language-server#27Tristan Gingold2019-09-062-0/+96
* vhdl: fix unused warning on protected variable.Tristan Gingold2019-09-061-0/+1
* testsuite: add testcase for #918Tristan Gingold2019-09-052-0/+54
* vhdl: handle P32 in connect_scalar. Fix #918Tristan Gingold2019-09-051-1/+2
* testsuite/synth: add test for previous commit.Tristan Gingold2019-09-054-0/+99
* synth: handle const record aggregates.Tristan Gingold2019-09-054-21/+64
* testsuite/synth: re-enable stmt01 test.Tristan Gingold2019-09-051-1/+0
* synth: handle non-constant array aggregates.Tristan Gingold2019-09-052-1/+15
* synth: add netlists.concatsTristan Gingold2019-09-053-31/+140
* synth: add value_const_array.Tristan Gingold2019-09-054-18/+68
* synth-disp_vhdl: handle arrays in disp_out_converter.Tristan Gingold2019-09-051-1/+19
* synth: handle const_bit in disp_constant_inline.Tristan Gingold2019-09-041-0/+4
* synth: handle large width in get_net.Tristan Gingold2019-09-042-4/+14
* testsuite: add case for previous commit.Tristan Gingold2019-09-042-0/+18
* vhdl: do not crash on attribute with a type conversion prefix.Tristan Gingold2019-09-041-2/+3
* testsuite/synth: rename disp01 to dispin01Tristan Gingold2019-09-0419-0/+0
* testsuite/synth: add tests for previous commit.Tristan Gingold2019-09-0425-0/+427
* synth-disp_vhdl: handle records for outputs.Tristan Gingold2019-09-041-42/+76
* testsuite/synth: add testcase for previous commit.Tristan Gingold2019-09-0319-0/+381
* synth-disp_vhdl: handle record for input ports.Tristan Gingold2019-09-038-44/+114
* synth: subtype conversion before compare.Tristan Gingold2019-09-031-2/+7
* testsuite: add reproducer for issue #912Tristan Gingold2019-09-023-0/+67
* synth: handle conditional variable assignment.Tristan Gingold2019-09-021-0/+34
* vhdl: renames Conditional_Expression to Conditional_Expression_Chain.Tristan Gingold2019-09-0210-42/+45
* vhdl synth: recognize more operators (add uns log).Tristan Gingold2019-09-024-100/+157
* revert "configure: fix setting abs_srcdir on MSYS2/MINGW" (#911) (#914)1138-4EB2019-09-021-6/+5
* Fix UPF (#905)1138-4EB2019-09-014-5/+21
* Fix configure (#911)1138-4EB2019-09-011-216/+222
* fix(configure): ignore line ending when comparing ghdl_version and libghdl_ve...1138-4EB2019-09-011-1/+1
* readme: fix refs to 'Building' (#909)1138-4EB2019-08-311-3/+3
* [doc] Update section 'Getting GHDL' (#906)1138-4EB2019-08-3121-425/+268
* Merge pull request #907 from sharkcz/llvm-fixtgingold2019-08-311-1/+1
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| * fix llvm build with synth enabledDan Horák2019-08-311-1/+1
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* synth: remove insert gate.Tristan Gingold2019-08-314-70/+0
* synth: improve synth_uresize.Tristan Gingold2019-08-313-26/+50
* synth: elab subprogram interfaces subtypeTristan Gingold2019-08-311-2/+13
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