| Commit message (Expand) | Author | Age | Files | Lines |
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| * | errorout_memory.py: decode messages using latin-1 | Tristan Gingold | 2022-06-25 | 1 | -1/+1 |
| * | pyGHDL/lsp: load files as bytes string | Tristan Gingold | 2022-06-25 | 2 | -4/+5 |
| * | testsuite/gna: add a test for #2101 | Tristan Gingold | 2022-06-25 | 2 | -0/+30 |
| * | doc: fix outdated link in precompile vendor readme (#2106) | Unai Martinez-Corral | 2022-06-22 | 1 | -3/+3 |
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| | * | Fix outdated link in precompile vendor readme | Hauke Günther | 2022-06-22 | 1 | -2/+2 |
| | * | Fix typo | Hauke Günther | 2022-06-22 | 1 | -1/+1 |
| * | | testsuite/gna: add tests for #2104 | Tristan Gingold | 2022-06-22 | 7 | -0/+115 |
| * | | trans-chap8: adjust conditions to pass parameters. Fix #2104 | Tristan Gingold | 2022-06-22 | 1 | -2/+9 |
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| * | testsuite/gna: add a test for #2103 | Tristan Gingold | 2022-06-21 | 9 | -0/+594 |
| * | vhdl-sem.adb: avoid a crash on conformance error. Fix #2103 | Tristan Gingold | 2022-06-21 | 1 | -2/+2 |
| * | pyGHDL: codacy issues | umarcor | 2022-06-20 | 1 | -2/+1 |
| * | Bumped dependencies to support pyTooling ≥2.0. | Patrick Lehmann | 2022-06-19 | 9 | -30/+44 |
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| | * | Made paths relative, so it can be launched from testsuits directory too. | Patrick Lehmann | 2022-06-19 | 1 | -3/+5 |
| | * | Enabled AMS support for all VHDL files. Added more [NOT IMPLEMENTED] rules to... | Patrick Lehmann | 2022-06-19 | 3 | -13/+26 |
| | * | Checking if all other stuff is working without sanity checks. | Patrick Lehmann | 2022-06-18 | 1 | -0/+1 |
| | * | Updated dependency to pyVHDLModel to 0.14.4. | Patrick Lehmann | 2022-06-18 | 1 | -1/+1 |
| | * | Bumped Python package dependencies in pyGHDL. | Patrick Lehmann | 2022-06-18 | 3 | -7/+7 |
| | * | Fixed failing sanity checks for pyGHDL.dom in coverage job. | Patrick Lehmann | 2022-06-18 | 2 | -4/+6 |
| | * | Bumped dependency of pyVHDLModel to latest release. | Patrick Lehmann | 2022-06-18 | 2 | -2/+2 |
| | * | Workaround for Application class. | Patrick Lehmann | 2022-06-18 | 1 | -6/+2 |
| | * | Bumped dependencies to support pyTooling ≥2.0. | Patrick Lehmann | 2022-06-18 | 2 | -3/+3 |
| * | | vhdl-sem_lib: do not disable warnings for files in -c/-r | Tristan Gingold | 2022-06-19 | 1 | -1/+5 |
| * | | testsuite/gna: add a test for #2066 | Tristan Gingold | 2022-06-19 | 3 | -0/+46 |
| * | | trans-chap7: translate anonymous subtype of overflow literal. Fox #2066 | Tristan Gingold | 2022-06-19 | 1 | -2/+6 |
| * | | vhdl-sem_expr: check expression index range for aggregate. Fix #2066 | Tristan Gingold | 2022-06-19 | 1 | -0/+25 |
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| * | doc: document all warnings | Tristan Gingold | 2022-06-17 | 1 | -23/+122 |
| * | testsuite/synth: add a test for #2099 | Tristan Gingold | 2022-06-16 | 2 | -0/+39 |
| * | synth-vhdl_insts(synth_single_input_assoc): handle type conversion. | Tristan Gingold | 2022-06-16 | 2 | -4/+13 |
| * | testsuite/gna: add a test for #2098 | Tristan Gingold | 2022-06-16 | 2 | -0/+167 |
| * | vhdl-sem.adb(are_trees_equal): handle simple aggregate. | Tristan Gingold | 2022-06-16 | 1 | -14/+12 |
| * | testsuite/gna: add a test for #2065 | Tristan Gingold | 2022-06-16 | 4 | -0/+742 |
| * | vhdl/translate: handle inertial association in recursive instantiation | Tristan Gingold | 2022-06-16 | 2 | -2/+16 |
| * | testsuite/gna: add a test for #2097 | Tristan Gingold | 2022-06-16 | 6 | -0/+209 |
| * | vhdl-sem_names: handle element and subtype attributes for type conv. | Tristan Gingold | 2022-06-16 | 1 | -22/+26 |
| * | vhdl-sem_expr: do not attribute element or subtype attributes as expr. | Tristan Gingold | 2022-06-16 | 1 | -0/+2 |
| * | testsuite/gna: add a test for #2071 | Tristan Gingold | 2022-06-15 | 4 | -0/+111 |
| * | vhdl: handle 'element in 'range. Fix #2071 | Tristan Gingold | 2022-06-15 | 2 | -23/+104 |
| * | Add comments | Tristan Gingold | 2022-06-15 | 2 | -1/+2 |
| * | testsuite/synth: add a test for #2093 | Tristan Gingold | 2022-06-15 | 3 | -1/+54 |
| * | netlists-rename: handle handle signal instances. Fix #2093 | Tristan Gingold | 2022-06-15 | 3 | -2/+28 |
| * | testsuite/synth: add a test for #2054 | Tristan Gingold | 2022-06-14 | 2 | -0/+27 |
| * | src/synth: add netlists.rename to rename identifiers. Fix #2054 | Tristan Gingold | 2022-06-14 | 4 | -2/+132 |
| * | testsuite/synth: add a test for #2092 | Tristan Gingold | 2022-06-13 | 2 | -0/+36 |
| * | netlists-disp_verilog: do not display blackboxes. Fix #2092 | Tristan Gingold | 2022-06-13 | 1 | -0/+5 |
| * | Merge pull request #2094 from antonblanchard/synth-verilog-blocking | tgingold | 2022-06-13 | 1 | -10/+10 |
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| | * | netlists-disp_verilog: Use blocking assignments in non-clocked blocks | Anton Blanchard | 2022-06-13 | 1 | -10/+10 |
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| * | testsuite/gna: add a test for #2091 | Tristan Gingold | 2022-06-12 | 3 | -0/+117 |
| * | vhdl: add a parent field to protected_type_declaration. Fix #2091 | Tristan Gingold | 2022-06-12 | 3 | -265/+271 |
| * | testsuite/synth: add a test. close #2080 | Tristan Gingold | 2022-06-12 | 3 | -0/+62 |
| * | testsuite/synth: add a test for #2090 | Tristan Gingold | 2022-06-12 | 2 | -0/+70 |
