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author | Tristan Gingold <tgingold@free.fr> | 2019-09-25 08:07:39 +0200 |
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committer | Tristan Gingold <tgingold@free.fr> | 2019-09-25 08:07:39 +0200 |
commit | dcc353b07b82a84f2aa598de3884c58f406e0652 (patch) | |
tree | 00e78e1c534658f845771b8b65d5e1caf69dbbc1 /testsuite | |
parent | 15fca8c254f44c5ae5dbe945195c12035f485df5 (diff) | |
download | ghdl-dcc353b07b82a84f2aa598de3884c58f406e0652.tar.gz ghdl-dcc353b07b82a84f2aa598de3884c58f406e0652.tar.bz2 ghdl-dcc353b07b82a84f2aa598de3884c58f406e0652.zip |
testsuite/synth: add testcase for #941
Diffstat (limited to 'testsuite')
-rw-r--r-- | testsuite/synth/issue941/ent.vhdl | 14 | ||||
-rwxr-xr-x | testsuite/synth/issue941/testsuite.sh | 11 |
2 files changed, 25 insertions, 0 deletions
diff --git a/testsuite/synth/issue941/ent.vhdl b/testsuite/synth/issue941/ent.vhdl new file mode 100644 index 000000000..f2cb8b642 --- /dev/null +++ b/testsuite/synth/issue941/ent.vhdl @@ -0,0 +1,14 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity ent is + port ( + i : in std_logic_vector(7 downto 0); + o : out std_logic_vector(7 downto 0) + ); +end entity; + +architecture a of ent is +begin + o <= i(i'high downto i'low); +end; diff --git a/testsuite/synth/issue941/testsuite.sh b/testsuite/synth/issue941/testsuite.sh new file mode 100755 index 000000000..6ae2a9715 --- /dev/null +++ b/testsuite/synth/issue941/testsuite.sh @@ -0,0 +1,11 @@ +#! /bin/sh + +. ../../testenv.sh + +for f in ent; do + synth $f.vhdl -e $f > syn_$f.vhdl + analyze syn_$f.vhdl +done +clean + +echo "Test successful" |