From dcc353b07b82a84f2aa598de3884c58f406e0652 Mon Sep 17 00:00:00 2001
From: Tristan Gingold <tgingold@free.fr>
Date: Wed, 25 Sep 2019 08:07:39 +0200
Subject: testsuite/synth: add testcase for #941

---
 testsuite/synth/issue941/ent.vhdl     | 14 ++++++++++++++
 testsuite/synth/issue941/testsuite.sh | 11 +++++++++++
 2 files changed, 25 insertions(+)
 create mode 100644 testsuite/synth/issue941/ent.vhdl
 create mode 100755 testsuite/synth/issue941/testsuite.sh

(limited to 'testsuite')

diff --git a/testsuite/synth/issue941/ent.vhdl b/testsuite/synth/issue941/ent.vhdl
new file mode 100644
index 000000000..f2cb8b642
--- /dev/null
+++ b/testsuite/synth/issue941/ent.vhdl
@@ -0,0 +1,14 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity ent is
+    port (
+        i : in std_logic_vector(7 downto 0);
+        o : out std_logic_vector(7 downto 0)
+    );
+end entity;
+
+architecture a of ent is
+begin
+    o <= i(i'high downto i'low);
+end;
diff --git a/testsuite/synth/issue941/testsuite.sh b/testsuite/synth/issue941/testsuite.sh
new file mode 100755
index 000000000..6ae2a9715
--- /dev/null
+++ b/testsuite/synth/issue941/testsuite.sh
@@ -0,0 +1,11 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+for f in ent; do
+  synth $f.vhdl -e $f > syn_$f.vhdl
+  analyze syn_$f.vhdl
+done
+clean
+
+echo "Test successful"
-- 
cgit v1.2.3