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| author | Tristan Gingold <tgingold@free.fr> | 2014-12-13 13:35:27 +0100 |
|---|---|---|
| committer | Tristan Gingold <tgingold@free.fr> | 2014-12-13 13:35:27 +0100 |
| commit | 6b0e4e8d1e42ac329e12fafa3758f3ccd106b436 (patch) | |
| tree | 9f4cfe08199349f1e7af54580e2c92c3e737bb79 /testsuite | |
| parent | e3f6f212fe25e2fdb757d6bbf27fd51d0c296e8d (diff) | |
| download | ghdl-6b0e4e8d1e42ac329e12fafa3758f3ccd106b436.tar.gz ghdl-6b0e4e8d1e42ac329e12fafa3758f3ccd106b436.tar.bz2 ghdl-6b0e4e8d1e42ac329e12fafa3758f3ccd106b436.zip | |
PSL: allow labels on psl directives (fix ticket26).
Diffstat (limited to 'testsuite')
| -rw-r--r-- | testsuite/gna/ticket18/psl_test_error.vhd | 4 | ||||
| -rw-r--r-- | testsuite/gna/ticket18/psl_test_working.vhd | 4 | ||||
| -rw-r--r-- | testsuite/gna/ticket19/psl_test_cover.vhd | 4 | ||||
| -rw-r--r-- | testsuite/gna/ticket19/psl_test_cover2.vhd | 2 | ||||
| -rw-r--r-- | testsuite/gna/ticket19/psl_test_cover3.vhd | 2 |
5 files changed, 8 insertions, 8 deletions
diff --git a/testsuite/gna/ticket18/psl_test_error.vhd b/testsuite/gna/ticket18/psl_test_error.vhd index aff436254..07a96d54f 100644 --- a/testsuite/gna/ticket18/psl_test_error.vhd +++ b/testsuite/gna/ticket18/psl_test_error.vhd @@ -42,7 +42,7 @@ begin - -- psl statements + -- -psl statements -- psl default clock is rising_edge(s_clk); @@ -50,4 +50,4 @@ begin -- psl assert always (s_write -> not(s_read)) report "ERROR: s_write and s_read active @ same time!"; -end architecture test;
\ No newline at end of file +end architecture test; diff --git a/testsuite/gna/ticket18/psl_test_working.vhd b/testsuite/gna/ticket18/psl_test_working.vhd index acb8aae1a..7939cffc6 100644 --- a/testsuite/gna/ticket18/psl_test_working.vhd +++ b/testsuite/gna/ticket18/psl_test_working.vhd @@ -42,7 +42,7 @@ begin - -- psl statements + -- -psl statements -- psl default clock is rising_edge(s_clk); @@ -50,4 +50,4 @@ begin -- psl assert always (s_write -> not(s_read)); -end architecture test;
\ No newline at end of file +end architecture test; diff --git a/testsuite/gna/ticket19/psl_test_cover.vhd b/testsuite/gna/ticket19/psl_test_cover.vhd index 4f3666f19..9fa73ec05 100644 --- a/testsuite/gna/ticket19/psl_test_cover.vhd +++ b/testsuite/gna/ticket19/psl_test_cover.vhd @@ -42,7 +42,7 @@ begin - -- psl statements + -- -psl statements -- psl default clock is rising_edge(s_clk); @@ -50,4 +50,4 @@ begin -- psl cover always (s_write -> not(s_read)); -end architecture test;
\ No newline at end of file +end architecture test; diff --git a/testsuite/gna/ticket19/psl_test_cover2.vhd b/testsuite/gna/ticket19/psl_test_cover2.vhd index 16d6ac810..000657d4c 100644 --- a/testsuite/gna/ticket19/psl_test_cover2.vhd +++ b/testsuite/gna/ticket19/psl_test_cover2.vhd @@ -49,7 +49,7 @@ begin - -- psl statements + -- -psl statements -- psl default clock is rising_edge(s_clk); diff --git a/testsuite/gna/ticket19/psl_test_cover3.vhd b/testsuite/gna/ticket19/psl_test_cover3.vhd index 0ef5d6ed9..260a47965 100644 --- a/testsuite/gna/ticket19/psl_test_cover3.vhd +++ b/testsuite/gna/ticket19/psl_test_cover3.vhd @@ -42,7 +42,7 @@ begin - -- psl statements + --- psl statements -- psl default clock is rising_edge(s_clk); |