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authorTristan Gingold <tgingold@free.fr>2020-04-17 18:06:05 +0200
committerTristan Gingold <tgingold@free.fr>2020-04-17 19:12:18 +0200
commit37c6a396d128d88cde148da60e0ac81fab1c6e62 (patch)
treee88ac242996e7d7b46bd058e36c11fa5150e73a3 /testsuite/synth/issue1237
parent849d6833c75cbcfa952f586ffe75265ca72b1ff6 (diff)
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testsuite/synth: add a test for #1237
Diffstat (limited to 'testsuite/synth/issue1237')
-rw-r--r--testsuite/synth/issue1237/mwe.vhdl23
-rwxr-xr-xtestsuite/synth/issue1237/testsuite.sh7
2 files changed, 30 insertions, 0 deletions
diff --git a/testsuite/synth/issue1237/mwe.vhdl b/testsuite/synth/issue1237/mwe.vhdl
new file mode 100644
index 000000000..0121b3a09
--- /dev/null
+++ b/testsuite/synth/issue1237/mwe.vhdl
@@ -0,0 +1,23 @@
+library ieee;
+use ieee.std_logic_1164.all;
+
+entity MWE is
+end MWE;
+
+architecture test of MWE is
+ constant P : integer := 1;
+ signal my_sig : std_logic_vector(P downto 0);
+begin
+ block2: if P = 2 generate
+ my_sig(2) <= '1';
+ end generate;
+
+ block1: if P = 1 generate
+ my_sig(1) <= '1';
+ end generate;
+
+ -- even this block alone breaks during analysis
+ blockf: if false generate
+ my_sig(2) <= '1';
+ end generate;
+end architecture;
diff --git a/testsuite/synth/issue1237/testsuite.sh b/testsuite/synth/issue1237/testsuite.sh
new file mode 100755
index 000000000..fb89d4e19
--- /dev/null
+++ b/testsuite/synth/issue1237/testsuite.sh
@@ -0,0 +1,7 @@
+#! /bin/sh
+
+. ../../testenv.sh
+
+synth mwe.vhdl -e > syn_mwe.vhdl
+
+echo "Test successful"