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author | Tristan Gingold <tgingold@free.fr> | 2020-01-19 17:32:11 +0100 |
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committer | Tristan Gingold <tgingold@free.fr> | 2020-01-19 17:32:11 +0100 |
commit | 0c05b9dd951150f8a26ad89b61b8f4e3a29364f9 (patch) | |
tree | a3b150191799e5f5fa8b26fea8e54840839a0495 /testsuite/synth/issue1100/repro.vhdl | |
parent | d8148c335bc63c84ff4e2b07d0a6cbe1ec014206 (diff) | |
download | ghdl-0c05b9dd951150f8a26ad89b61b8f4e3a29364f9.tar.gz ghdl-0c05b9dd951150f8a26ad89b61b8f4e3a29364f9.tar.bz2 ghdl-0c05b9dd951150f8a26ad89b61b8f4e3a29364f9.zip |
testsuite/synth: add test for #1100.
Diffstat (limited to 'testsuite/synth/issue1100/repro.vhdl')
-rw-r--r-- | testsuite/synth/issue1100/repro.vhdl | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/testsuite/synth/issue1100/repro.vhdl b/testsuite/synth/issue1100/repro.vhdl new file mode 100644 index 000000000..9215a19a0 --- /dev/null +++ b/testsuite/synth/issue1100/repro.vhdl @@ -0,0 +1,42 @@ +library ieee; +use ieee.std_logic_1164.all; +use ieee.numeric_std.all; + +entity repro is + port (val : std_logic_vector (63 downto 0); + iperm : std_logic_vector (3*8 - 1 downto 0); + en : std_ulogic; + res : out std_logic_vector (63 downto 0)); +end entity repro; + +architecture behaviour of repro is + type arecordtype is record + valid : std_ulogic; + write_data : std_ulogic_vector(63 downto 0); + end record; + + signal a : arecordtype; + + subtype byte_index_t is unsigned(2 downto 0); + type permutation_t is array(0 to 7) of byte_index_t; + signal perm : permutation_t := (others => "000"); +begin + writeback_1: process(all) + variable j : integer; + begin + for i in 0 to 7 loop + j := to_integer(perm(i)) * 8; + res(i * 8 + 7 downto i * 8) <= a.write_data(j + 7 downto j); + end loop; + end process; + + a.valid <= en; + a.write_data <= val; + + process (iperm) is + begin + for i in 0 to 7 loop + perm (i) <= unsigned (iperm (i*3 + 2 downto i*3)); + end loop; + end process; +end; |